CacheMemory.cc (11793:ef606668d247) | CacheMemory.cc (13449:2f7efa89c58b) |
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1/* 2 * Copyright (c) 1999-2012 Mark D. Hill and David A. Wood 3 * Copyright (c) 2013 Advanced Micro Devices, Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 16 unchanged lines hidden (view full) --- 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30#include "mem/ruby/structures/CacheMemory.hh" 31 32#include "base/intmath.hh" | 1/* 2 * Copyright (c) 1999-2012 Mark D. Hill and David A. Wood 3 * Copyright (c) 2013 Advanced Micro Devices, Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 16 unchanged lines hidden (view full) --- 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30#include "mem/ruby/structures/CacheMemory.hh" 31 32#include "base/intmath.hh" |
33#include "base/logging.hh" |
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33#include "debug/RubyCache.hh" 34#include "debug/RubyCacheTrace.hh" 35#include "debug/RubyResourceStalls.hh" 36#include "debug/RubyStats.hh" 37#include "mem/protocol/AccessPermission.hh" 38#include "mem/ruby/system/RubySystem.hh" 39#include "mem/ruby/system/WeightedLRUPolicy.hh" 40 --- 591 unchanged lines hidden (view full) --- 632 else { 633 DPRINTF(RubyResourceStalls, 634 "Data array stall on addr %#x in set %d\n", 635 addr, addressToCacheSet(addr)); 636 numDataArrayStalls++; 637 return false; 638 } 639 } else { | 34#include "debug/RubyCache.hh" 35#include "debug/RubyCacheTrace.hh" 36#include "debug/RubyResourceStalls.hh" 37#include "debug/RubyStats.hh" 38#include "mem/protocol/AccessPermission.hh" 39#include "mem/ruby/system/RubySystem.hh" 40#include "mem/ruby/system/WeightedLRUPolicy.hh" 41 --- 591 unchanged lines hidden (view full) --- 633 else { 634 DPRINTF(RubyResourceStalls, 635 "Data array stall on addr %#x in set %d\n", 636 addr, addressToCacheSet(addr)); 637 numDataArrayStalls++; 638 return false; 639 } 640 } else { |
640 assert(false); 641 return true; | 641 panic("Unrecognized cache resource type."); |
642 } 643} 644 645bool 646CacheMemory::isBlockInvalid(int64_t cache_set, int64_t loc) 647{ 648 return (m_cache[cache_set][loc]->m_Permission == AccessPermission_Invalid); 649} 650 651bool 652CacheMemory::isBlockNotBusy(int64_t cache_set, int64_t loc) 653{ 654 return (m_cache[cache_set][loc]->m_Permission != AccessPermission_Busy); 655} | 642 } 643} 644 645bool 646CacheMemory::isBlockInvalid(int64_t cache_set, int64_t loc) 647{ 648 return (m_cache[cache_set][loc]->m_Permission == AccessPermission_Invalid); 649} 650 651bool 652CacheMemory::isBlockNotBusy(int64_t cache_set, int64_t loc) 653{ 654 return (m_cache[cache_set][loc]->m_Permission != AccessPermission_Busy); 655} |