CacheMemory.cc (11108:6342ddf6d733) CacheMemory.cc (11118:75c1e564a725)
1/*
2 * Copyright (c) 1999-2012 Mark D. Hill and David A. Wood
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

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158 return entry->m_Address;
159}
160
161bool
162CacheMemory::tryCacheAccess(Addr address, RubyRequestType type,
163 DataBlock*& data_ptr)
164{
165 assert(address == makeLineAddress(address));
1/*
2 * Copyright (c) 1999-2012 Mark D. Hill and David A. Wood
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

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158 return entry->m_Address;
159}
160
161bool
162CacheMemory::tryCacheAccess(Addr address, RubyRequestType type,
163 DataBlock*& data_ptr)
164{
165 assert(address == makeLineAddress(address));
166 DPRINTF(RubyCache, "address: %s\n", address);
166 DPRINTF(RubyCache, "address: %#x\n", address);
167 int64_t cacheSet = addressToCacheSet(address);
168 int loc = findTagInSet(cacheSet, address);
169 if (loc != -1) {
170 // Do we even have a tag match?
171 AbstractCacheEntry* entry = m_cache[cacheSet][loc];
172 m_replacementPolicy_ptr->touch(cacheSet, loc, curTick());
173 data_ptr = &(entry->getDataBlk());
174

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185 return false;
186}
187
188bool
189CacheMemory::testCacheAccess(Addr address, RubyRequestType type,
190 DataBlock*& data_ptr)
191{
192 assert(address == makeLineAddress(address));
167 int64_t cacheSet = addressToCacheSet(address);
168 int loc = findTagInSet(cacheSet, address);
169 if (loc != -1) {
170 // Do we even have a tag match?
171 AbstractCacheEntry* entry = m_cache[cacheSet][loc];
172 m_replacementPolicy_ptr->touch(cacheSet, loc, curTick());
173 data_ptr = &(entry->getDataBlk());
174

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185 return false;
186}
187
188bool
189CacheMemory::testCacheAccess(Addr address, RubyRequestType type,
190 DataBlock*& data_ptr)
191{
192 assert(address == makeLineAddress(address));
193 DPRINTF(RubyCache, "address: %s\n", address);
193 DPRINTF(RubyCache, "address: %#x\n", address);
194 int64_t cacheSet = addressToCacheSet(address);
195 int loc = findTagInSet(cacheSet, address);
196
197 if (loc != -1) {
198 // Do we even have a tag match?
199 AbstractCacheEntry* entry = m_cache[cacheSet][loc];
200 m_replacementPolicy_ptr->touch(cacheSet, loc, curTick());
201 data_ptr = &(entry->getDataBlk());

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213CacheMemory::isTagPresent(Addr address) const
214{
215 assert(address == makeLineAddress(address));
216 int64_t cacheSet = addressToCacheSet(address);
217 int loc = findTagInSet(cacheSet, address);
218
219 if (loc == -1) {
220 // We didn't find the tag
194 int64_t cacheSet = addressToCacheSet(address);
195 int loc = findTagInSet(cacheSet, address);
196
197 if (loc != -1) {
198 // Do we even have a tag match?
199 AbstractCacheEntry* entry = m_cache[cacheSet][loc];
200 m_replacementPolicy_ptr->touch(cacheSet, loc, curTick());
201 data_ptr = &(entry->getDataBlk());

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213CacheMemory::isTagPresent(Addr address) const
214{
215 assert(address == makeLineAddress(address));
216 int64_t cacheSet = addressToCacheSet(address);
217 int loc = findTagInSet(cacheSet, address);
218
219 if (loc == -1) {
220 // We didn't find the tag
221 DPRINTF(RubyCache, "No tag match for address: %s\n", address);
221 DPRINTF(RubyCache, "No tag match for address: %#x\n", address);
222 return false;
223 }
222 return false;
223 }
224 DPRINTF(RubyCache, "address: %s found\n", address);
224 DPRINTF(RubyCache, "address: %#x found\n", address);
225 return true;
226}
227
228// Returns true if there is:
229// a) a tag match on this address or there is
230// b) an unused line in the same cache "way"
231bool
232CacheMemory::cacheAvail(Addr address) const

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251}
252
253AbstractCacheEntry*
254CacheMemory::allocate(Addr address, AbstractCacheEntry *entry, bool touch)
255{
256 assert(address == makeLineAddress(address));
257 assert(!isTagPresent(address));
258 assert(cacheAvail(address));
225 return true;
226}
227
228// Returns true if there is:
229// a) a tag match on this address or there is
230// b) an unused line in the same cache "way"
231bool
232CacheMemory::cacheAvail(Addr address) const

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251}
252
253AbstractCacheEntry*
254CacheMemory::allocate(Addr address, AbstractCacheEntry *entry, bool touch)
255{
256 assert(address == makeLineAddress(address));
257 assert(!isTagPresent(address));
258 assert(cacheAvail(address));
259 DPRINTF(RubyCache, "address: %s\n", address);
259 DPRINTF(RubyCache, "address: %#x\n", address);
260
261 // Find the first open slot
262 int64_t cacheSet = addressToCacheSet(address);
263 std::vector<AbstractCacheEntry*> &set = m_cache[cacheSet];
264 for (int i = 0; i < m_cache_assoc; i++) {
265 if (!set[i] || set[i]->m_Permission == AccessPermission_NotPresent) {
266 set[i] = entry; // Init entry
267 set[i]->m_Address = address;

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283 panic("Allocate didn't find an available entry");
284}
285
286void
287CacheMemory::deallocate(Addr address)
288{
289 assert(address == makeLineAddress(address));
290 assert(isTagPresent(address));
260
261 // Find the first open slot
262 int64_t cacheSet = addressToCacheSet(address);
263 std::vector<AbstractCacheEntry*> &set = m_cache[cacheSet];
264 for (int i = 0; i < m_cache_assoc; i++) {
265 if (!set[i] || set[i]->m_Permission == AccessPermission_NotPresent) {
266 set[i] = entry; // Init entry
267 set[i]->m_Address = address;

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283 panic("Allocate didn't find an available entry");
284}
285
286void
287CacheMemory::deallocate(Addr address)
288{
289 assert(address == makeLineAddress(address));
290 assert(isTagPresent(address));
291 DPRINTF(RubyCache, "address: %s\n", address);
291 DPRINTF(RubyCache, "address: %#x\n", address);
292 int64_t cacheSet = addressToCacheSet(address);
293 int loc = findTagInSet(cacheSet, address);
294 if (loc != -1) {
295 delete m_cache[cacheSet][loc];
296 m_cache[cacheSet][loc] = NULL;
297 m_tag_index.erase(address);
298 }
299}

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412CacheMemory::printData(ostream& out) const
413{
414 out << "printData() not supported" << endl;
415}
416
417void
418CacheMemory::setLocked(Addr address, int context)
419{
292 int64_t cacheSet = addressToCacheSet(address);
293 int loc = findTagInSet(cacheSet, address);
294 if (loc != -1) {
295 delete m_cache[cacheSet][loc];
296 m_cache[cacheSet][loc] = NULL;
297 m_tag_index.erase(address);
298 }
299}

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412CacheMemory::printData(ostream& out) const
413{
414 out << "printData() not supported" << endl;
415}
416
417void
418CacheMemory::setLocked(Addr address, int context)
419{
420 DPRINTF(RubyCache, "Setting Lock for addr: %x to %d\n", address, context);
420 DPRINTF(RubyCache, "Setting Lock for addr: %#x to %d\n", address, context);
421 assert(address == makeLineAddress(address));
422 int64_t cacheSet = addressToCacheSet(address);
423 int loc = findTagInSet(cacheSet, address);
424 assert(loc != -1);
425 m_cache[cacheSet][loc]->setLocked(context);
426}
427
428void
429CacheMemory::clearLocked(Addr address)
430{
421 assert(address == makeLineAddress(address));
422 int64_t cacheSet = addressToCacheSet(address);
423 int loc = findTagInSet(cacheSet, address);
424 assert(loc != -1);
425 m_cache[cacheSet][loc]->setLocked(context);
426}
427
428void
429CacheMemory::clearLocked(Addr address)
430{
431 DPRINTF(RubyCache, "Clear Lock for addr: %x\n", address);
431 DPRINTF(RubyCache, "Clear Lock for addr: %#x\n", address);
432 assert(address == makeLineAddress(address));
433 int64_t cacheSet = addressToCacheSet(address);
434 int loc = findTagInSet(cacheSet, address);
435 assert(loc != -1);
436 m_cache[cacheSet][loc]->clearLocked();
437}
438
439bool
440CacheMemory::isLocked(Addr address, int context)
441{
442 assert(address == makeLineAddress(address));
443 int64_t cacheSet = addressToCacheSet(address);
444 int loc = findTagInSet(cacheSet, address);
445 assert(loc != -1);
432 assert(address == makeLineAddress(address));
433 int64_t cacheSet = addressToCacheSet(address);
434 int loc = findTagInSet(cacheSet, address);
435 assert(loc != -1);
436 m_cache[cacheSet][loc]->clearLocked();
437}
438
439bool
440CacheMemory::isLocked(Addr address, int context)
441{
442 assert(address == makeLineAddress(address));
443 int64_t cacheSet = addressToCacheSet(address);
444 int loc = findTagInSet(cacheSet, address);
445 assert(loc != -1);
446 DPRINTF(RubyCache, "Testing Lock for addr: %llx cur %d con %d\n",
446 DPRINTF(RubyCache, "Testing Lock for addr: %#llx cur %d con %d\n",
447 address, m_cache[cacheSet][loc]->m_locked, context);
448 return m_cache[cacheSet][loc]->isLocked(context);
449}
450
451void
452CacheMemory::regStats()
453{
454 m_demand_hits

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577 if (!m_resource_stalls) {
578 return true;
579 }
580
581 if (res == CacheResourceType_TagArray) {
582 if (tagArray.tryAccess(addressToCacheSet(addr))) return true;
583 else {
584 DPRINTF(RubyResourceStalls,
447 address, m_cache[cacheSet][loc]->m_locked, context);
448 return m_cache[cacheSet][loc]->isLocked(context);
449}
450
451void
452CacheMemory::regStats()
453{
454 m_demand_hits

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577 if (!m_resource_stalls) {
578 return true;
579 }
580
581 if (res == CacheResourceType_TagArray) {
582 if (tagArray.tryAccess(addressToCacheSet(addr))) return true;
583 else {
584 DPRINTF(RubyResourceStalls,
585 "Tag array stall on addr %s in set %d\n",
585 "Tag array stall on addr %#x in set %d\n",
586 addr, addressToCacheSet(addr));
587 numTagArrayStalls++;
588 return false;
589 }
590 } else if (res == CacheResourceType_DataArray) {
591 if (dataArray.tryAccess(addressToCacheSet(addr))) return true;
592 else {
593 DPRINTF(RubyResourceStalls,
586 addr, addressToCacheSet(addr));
587 numTagArrayStalls++;
588 return false;
589 }
590 } else if (res == CacheResourceType_DataArray) {
591 if (dataArray.tryAccess(addressToCacheSet(addr))) return true;
592 else {
593 DPRINTF(RubyResourceStalls,
594 "Data array stall on addr %s in set %d\n",
594 "Data array stall on addr %#x in set %d\n",
595 addr, addressToCacheSet(addr));
596 numDataArrayStalls++;
597 return false;
598 }
599 } else {
600 assert(false);
601 return true;
602 }

--- 13 unchanged lines hidden --- 		595 addr, addressToCacheSet(addr));
596 numDataArrayStalls++;
597 return false;
598 }
599 } else {
600 assert(false);
601 return true;
602 }

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