CacheMemory.cc (10973:4820cc8408b0) | CacheMemory.cc (10974:bbdf1177f250) |
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1/* 2 * Copyright (c) 1999-2012 Mark D. Hill and David A. Wood 3 * Copyright (c) 2013 Advanced Micro Devices, Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 237 unchanged lines hidden (view full) --- 246 } else { 247 return true; 248 } 249 } 250 return false; 251} 252 253AbstractCacheEntry* | 1/* 2 * Copyright (c) 1999-2012 Mark D. Hill and David A. Wood 3 * Copyright (c) 2013 Advanced Micro Devices, Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 237 unchanged lines hidden (view full) --- 246 } else { 247 return true; 248 } 249 } 250 return false; 251} 252 253AbstractCacheEntry* |
254CacheMemory::allocate(const Address& address, AbstractCacheEntry* entry) | 254CacheMemory::allocate(const Address& address, AbstractCacheEntry* entry, bool touch) |
255{ 256 assert(address == line_address(address)); 257 assert(!isTagPresent(address)); 258 assert(cacheAvail(address)); 259 DPRINTF(RubyCache, "address: %s\n", address); 260 261 // Find the first open slot 262 int64 cacheSet = addressToCacheSet(address); 263 std::vector<AbstractCacheEntry*> &set = m_cache[cacheSet]; 264 for (int i = 0; i < m_cache_assoc; i++) { 265 if (!set[i] || set[i]->m_Permission == AccessPermission_NotPresent) { 266 set[i] = entry; // Init entry 267 set[i]->m_Address = address; 268 set[i]->m_Permission = AccessPermission_Invalid; 269 DPRINTF(RubyCache, "Allocate clearing lock for addr: %x\n", 270 address); 271 set[i]->m_locked = -1; 272 m_tag_index[address] = i; 273 | 255{ 256 assert(address == line_address(address)); 257 assert(!isTagPresent(address)); 258 assert(cacheAvail(address)); 259 DPRINTF(RubyCache, "address: %s\n", address); 260 261 // Find the first open slot 262 int64 cacheSet = addressToCacheSet(address); 263 std::vector<AbstractCacheEntry*> &set = m_cache[cacheSet]; 264 for (int i = 0; i < m_cache_assoc; i++) { 265 if (!set[i] || set[i]->m_Permission == AccessPermission_NotPresent) { 266 set[i] = entry; // Init entry 267 set[i]->m_Address = address; 268 set[i]->m_Permission = AccessPermission_Invalid; 269 DPRINTF(RubyCache, "Allocate clearing lock for addr: %x\n", 270 address); 271 set[i]->m_locked = -1; 272 m_tag_index[address] = i; 273 |
274 m_replacementPolicy_ptr->touch(cacheSet, i, curTick()); | 274 if (touch) { 275 m_replacementPolicy_ptr->touch(cacheSet, i, curTick()); 276 } |
275 276 return entry; 277 } 278 } 279 panic("Allocate didn't find an available entry"); 280} 281 282void --- 300 unchanged lines hidden --- | 277 278 return entry; 279 } 280 } 281 panic("Allocate didn't find an available entry"); 282} 283 284void --- 300 unchanged lines hidden --- |