CacheMemory.cc (10970:ea8bdb1d9f1e) CacheMemory.cc (10973:4820cc8408b0)
1/*
2 * Copyright (c) 1999-2012 Mark D. Hill and David A. Wood
1/*
2 * Copyright (c) 1999-2012 Mark D. Hill and David A. Wood
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the

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129 assert(tag == line_address(tag));
130 // search the set for the tags
131 m5::hash_map<Address, int>::const_iterator it = m_tag_index.find(tag);
132 if (it != m_tag_index.end())
133 return it->second;
134 return -1; // Not found
135}
136
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the

--- 118 unchanged lines hidden (view full) ---

130 assert(tag == line_address(tag));
131 // search the set for the tags
132 m5::hash_map<Address, int>::const_iterator it = m_tag_index.find(tag);
133 if (it != m_tag_index.end())
134 return it->second;
135 return -1; // Not found
136}
137
138// Given an unique cache block identifier (idx): return the valid address
139// stored by the cache block. If the block is invalid/notpresent, the
140// function returns the 0 address
141Address
142CacheMemory::getAddressAtIdx(int idx) const
143{
144 Address tmp(0);
145
146 int set = idx / m_cache_assoc;
147 assert(set < m_cache_num_sets);
148
149 int way = idx - set * m_cache_assoc;
150 assert (way < m_cache_assoc);
151
152 AbstractCacheEntry* entry = m_cache[set][way];
153 if (entry == NULL ||
154 entry->m_Permission == AccessPermission_Invalid ||
155 entry->m_Permission == AccessPermission_NotPresent) {
156 return tmp;
157 }
158 return entry->m_Address;
159}
160
137bool
138CacheMemory::tryCacheAccess(const Address& address, RubyRequestType type,
139 DataBlock*& data_ptr)
140{
141 assert(address == line_address(address));
142 DPRINTF(RubyCache, "address: %s\n", address);
143 int64 cacheSet = addressToCacheSet(address);
144 int loc = findTagInSet(cacheSet, address);

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161bool
162CacheMemory::tryCacheAccess(const Address& address, RubyRequestType type,
163 DataBlock*& data_ptr)
164{
165 assert(address == line_address(address));
166 DPRINTF(RubyCache, "address: %s\n", address);
167 int64 cacheSet = addressToCacheSet(address);
168 int loc = findTagInSet(cacheSet, address);

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