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< int64_t
---
> int64
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< CacheMemory::findTagInSet(int64_t cacheSet, Addr tag) const
---
> CacheMemory::findTagInSet(int64 cacheSet, Addr tag) const
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< CacheMemory::findTagInSetIgnorePermissions(int64_t cacheSet,
---
> CacheMemory::findTagInSetIgnorePermissions(int64 cacheSet,
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> bool
> CacheMemory::tryCacheAccess(Addr address, RubyRequestType type,
> DataBlock*& data_ptr)
> {
> assert(address == makeLineAddress(address));
> DPRINTF(RubyCache, "address: %s\n", address);
> int64 cacheSet = addressToCacheSet(address);
> int loc = findTagInSet(cacheSet, address);
> if (loc != -1) {
> // Do we even have a tag match?
> AbstractCacheEntry* entry = m_cache[cacheSet][loc];
> m_replacementPolicy_ptr->touch(cacheSet, loc, curTick());
> data_ptr = &(entry->getDataBlk());
>
> if (entry->m_Permission == AccessPermission_Read_Write) {
> return true;
> }
> if ((entry->m_Permission == AccessPermission_Read_Only) &&
> (type == RubyRequestType_LD || type == RubyRequestType_IFETCH)) {
> return true;
> }
> // The line must not be accessible
> }
> data_ptr = NULL;
> return false;
> }
>
> bool
> CacheMemory::testCacheAccess(Addr address, RubyRequestType type,
> DataBlock*& data_ptr)
> {
> assert(address == makeLineAddress(address));
> DPRINTF(RubyCache, "address: %s\n", address);
> int64 cacheSet = addressToCacheSet(address);
> int loc = findTagInSet(cacheSet, address);
>
> if (loc != -1) {
> // Do we even have a tag match?
> AbstractCacheEntry* entry = m_cache[cacheSet][loc];
> m_replacementPolicy_ptr->touch(cacheSet, loc, curTick());
> data_ptr = &(entry->getDataBlk());
>
> return m_cache[cacheSet][loc]->m_Permission !=
> AccessPermission_NotPresent;
> }
>
> data_ptr = NULL;
> return false;
> }
>
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< int64_t cacheSet = addressToCacheSet(address);
---
> int64 cacheSet = addressToCacheSet(address);
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< int64_t cacheSet = addressToCacheSet(address);
---
> int64 cacheSet = addressToCacheSet(address);
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< CacheMemory::allocate(Addr address, AbstractCacheEntry *entry, bool touch)
---
> CacheMemory::allocate(Addr address, AbstractCacheEntry* entry, bool touch)
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< int64_t cacheSet = addressToCacheSet(address);
---
> int64 cacheSet = addressToCacheSet(address);
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< entry->setSetIndex(cacheSet);
< entry->setWayIndex(i);
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< int64_t cacheSet = addressToCacheSet(address);
---
> int64 cacheSet = addressToCacheSet(address);
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< int64_t cacheSet = addressToCacheSet(address);
---
> int64 cacheSet = addressToCacheSet(address);
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< int64_t cacheSet = addressToCacheSet(address);
---
> int64 cacheSet = addressToCacheSet(address);
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< int64_t cacheSet = addressToCacheSet(address);
---
> int64 cacheSet = addressToCacheSet(address);
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< int64_t cacheSet = addressToCacheSet(address);
---
> int64 cacheSet = addressToCacheSet(address);
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< CacheMemory::setMRU(const AbstractCacheEntry *e)
< {
< uint32_t cacheSet = e->getSetIndex();
< uint32_t loc = e->getWayIndex();
< m_replacementPolicy_ptr->touch(cacheSet, loc, curTick());
< }
<
< void
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< uint64_t warmedUpBlocks = 0;
< uint64_t totalBlocks M5_VAR_USED = (uint64_t)m_cache_num_sets *
< (uint64_t)m_cache_assoc;
---
> uint64 warmedUpBlocks = 0;
> uint64 totalBlocks M5_VAR_USED = (uint64)m_cache_num_sets
> * (uint64)m_cache_assoc;
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< totalBlocks, (float(warmedUpBlocks) / float(totalBlocks)) * 100.0);
---
> (uint64)m_cache_num_sets * (uint64)m_cache_assoc,
> (float(warmedUpBlocks)/float(totalBlocks))*100.0);
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< int64_t cacheSet = addressToCacheSet(address);
---
> int64 cacheSet = addressToCacheSet(address);
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< m_cache[cacheSet][loc]->setLocked(context);
---
> m_cache[cacheSet][loc]->m_locked = context;
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< int64_t cacheSet = addressToCacheSet(address);
---
> int64 cacheSet = addressToCacheSet(address);
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< m_cache[cacheSet][loc]->clearLocked();
---
> m_cache[cacheSet][loc]->m_locked = -1;
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< int64_t cacheSet = addressToCacheSet(address);
---
> int64 cacheSet = addressToCacheSet(address);
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< return m_cache[cacheSet][loc]->isLocked(context);
---
> return m_cache[cacheSet][loc]->m_locked == context;
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< CacheMemory::isBlockInvalid(int64_t cache_set, int64_t loc)
---
> CacheMemory::isBlockInvalid(int64 cache_set, int64 loc)
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< CacheMemory::isBlockNotBusy(int64_t cache_set, int64_t loc)
---
> CacheMemory::isBlockNotBusy(int64 cache_set, int64 loc)