BankedArray.cc (11049:dfb0aa3f0649) BankedArray.cc (11061:25b53a7195f7)
1/*
2 * Copyright (c) 2012 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 35 unchanged lines hidden (view full) ---

44 if (banks != 0) {
45 bankBits = floorLog2(banks);
46 }
47
48 busyBanks.resize(banks);
49}
50
51bool
1/*
2 * Copyright (c) 2012 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 35 unchanged lines hidden (view full) ---

44 if (banks != 0) {
45 bankBits = floorLog2(banks);
46 }
47
48 busyBanks.resize(banks);
49}
50
51bool
52BankedArray::tryAccess(int64 idx)
52BankedArray::tryAccess(int64_t idx)
53{
54 if (accessLatency == 0)
55 return true;
56
57 unsigned int bank = mapIndexToBank(idx);
58 assert(bank < banks);
59
60 if (busyBanks[bank].endAccess >= curTick()) {
61 return false;
62 }
63
64 return true;
65}
66
67void
53{
54 if (accessLatency == 0)
55 return true;
56
57 unsigned int bank = mapIndexToBank(idx);
58 assert(bank < banks);
59
60 if (busyBanks[bank].endAccess >= curTick()) {
61 return false;
62 }
63
64 return true;
65}
66
67void
68BankedArray::reserve(int64 idx)
68BankedArray::reserve(int64_t idx)
69{
70 if (accessLatency == 0)
71 return;
72
73 unsigned int bank = mapIndexToBank(idx);
74 assert(bank < banks);
75
76 if(busyBanks[bank].endAccess >= curTick()) {

--- 9 unchanged lines hidden (view full) ---

86
87 busyBanks[bank].idx = idx;
88 busyBanks[bank].startAccess = curTick();
89 busyBanks[bank].endAccess = curTick() +
90 (accessLatency-1) * m_ruby_system->clockPeriod();
91}
92
93unsigned int
69{
70 if (accessLatency == 0)
71 return;
72
73 unsigned int bank = mapIndexToBank(idx);
74 assert(bank < banks);
75
76 if(busyBanks[bank].endAccess >= curTick()) {

--- 9 unchanged lines hidden (view full) ---

86
87 busyBanks[bank].idx = idx;
88 busyBanks[bank].startAccess = curTick();
89 busyBanks[bank].endAccess = curTick() +
90 (accessLatency-1) * m_ruby_system->clockPeriod();
91}
92
93unsigned int
94BankedArray::mapIndexToBank(int64 idx)
94BankedArray::mapIndexToBank(int64_t idx)
95{
96 if (banks == 1) {
97 return 0;
98 }
99 return idx % banks;
100}
95{
96 if (banks == 1) {
97 return 0;
98 }
99 return idx % banks;
100}