RubySlicc_ComponentMapping.hh (8485:7a9a7f2a3d46) | RubySlicc_ComponentMapping.hh (8602:836f8fad4a4c) |
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1/* 2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 15 unchanged lines hidden (view full) --- 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29#ifndef __MEM_RUBY_SLICC_INTERFACE_RUBYSLICC_COMPONENTMAPPINGS_HH__ 30#define __MEM_RUBY_SLICC_INTERFACE_RUBYSLICC_COMPONENTMAPPINGS_HH__ 31 | 1/* 2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 15 unchanged lines hidden (view full) --- 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29#ifndef __MEM_RUBY_SLICC_INTERFACE_RUBYSLICC_COMPONENTMAPPINGS_HH__ 30#define __MEM_RUBY_SLICC_INTERFACE_RUBYSLICC_COMPONENTMAPPINGS_HH__ 31 |
32#include "mem/protocol/GenericMachineType.hh" | |
33#include "mem/protocol/MachineType.hh" 34#include "mem/ruby/common/Address.hh" 35#include "mem/ruby/common/Global.hh" 36#include "mem/ruby/common/NetDest.hh" 37#include "mem/ruby/system/DirectoryMemory.hh" 38#include "mem/ruby/system/MachineID.hh" 39#include "mem/ruby/system/NodeID.hh" 40 | 32#include "mem/protocol/MachineType.hh" 33#include "mem/ruby/common/Address.hh" 34#include "mem/ruby/common/Global.hh" 35#include "mem/ruby/common/NetDest.hh" 36#include "mem/ruby/system/DirectoryMemory.hh" 37#include "mem/ruby/system/MachineID.hh" 38#include "mem/ruby/system/NodeID.hh" 39 |
41#ifdef MACHINETYPE_L1Cache 42#define MACHINETYPE_L1CACHE_ENUM MachineType_L1Cache 43#else 44#define MACHINETYPE_L1CACHE_ENUM MachineType_NUM 45#endif 46 47#ifdef MACHINETYPE_L2Cache 48#define MACHINETYPE_L2CACHE_ENUM MachineType_L2Cache 49#else 50#define MACHINETYPE_L2CACHE_ENUM MachineType_NUM 51#endif 52 53#ifdef MACHINETYPE_L3Cache 54#define MACHINETYPE_L3CACHE_ENUM MachineType_L3Cache 55#else 56#define MACHINETYPE_L3CACHE_ENUM MachineType_NUM 57#endif 58 59#ifdef MACHINETYPE_DMA 60#define MACHINETYPE_DMA_ENUM MachineType_DMA 61#else 62#define MACHINETYPE_DMA_ENUM MachineType_NUM 63#endif 64 | |
65// used to determine the home directory 66// returns a value between 0 and total_directories_within_the_system 67inline NodeID 68map_Address_to_DirectoryNode(const Address& addr) 69{ 70 return DirectoryMemory::mapAddressToDirectoryVersion(addr); 71} 72 73// used to determine the home directory 74// returns a value between 0 and total_directories_within_the_system 75inline MachineID 76map_Address_to_Directory(const Address &addr) 77{ 78 MachineID mach = 79 {MachineType_Directory, map_Address_to_DirectoryNode(addr)}; 80 return mach; 81} 82 | 40// used to determine the home directory 41// returns a value between 0 and total_directories_within_the_system 42inline NodeID 43map_Address_to_DirectoryNode(const Address& addr) 44{ 45 return DirectoryMemory::mapAddressToDirectoryVersion(addr); 46} 47 48// used to determine the home directory 49// returns a value between 0 and total_directories_within_the_system 50inline MachineID 51map_Address_to_Directory(const Address &addr) 52{ 53 MachineID mach = 54 {MachineType_Directory, map_Address_to_DirectoryNode(addr)}; 55 return mach; 56} 57 |
83inline MachineID 84map_Address_to_DMA(const Address & addr) 85{ 86 MachineID dma = {MACHINETYPE_DMA_ENUM, 0}; 87 return dma; 88} 89 | |
90inline NetDest 91broadcast(MachineType type) 92{ 93 NetDest dest; 94 for (int i = 0; i < MachineType_base_count(type); i++) { 95 MachineID mach = {type, i}; 96 dest.add(mach); 97 } --- 18 unchanged lines hidden (view full) --- 116} 117 118inline MachineType 119machineIDToMachineType(MachineID machID) 120{ 121 return machID.type; 122} 123 | 58inline NetDest 59broadcast(MachineType type) 60{ 61 NetDest dest; 62 for (int i = 0; i < MachineType_base_count(type); i++) { 63 MachineID mach = {type, i}; 64 dest.add(mach); 65 } --- 18 unchanged lines hidden (view full) --- 84} 85 86inline MachineType 87machineIDToMachineType(MachineID machID) 88{ 89 return machID.type; 90} 91 |
124inline NodeID 125L1CacheMachIDToProcessorNum(MachineID machID) 126{ 127 assert(machID.type == MACHINETYPE_L1CACHE_ENUM); 128 return machID.num; 129} 130 131inline MachineID 132getL1MachineID(NodeID L1RubyNode) 133{ 134 MachineID mach = {MACHINETYPE_L1CACHE_ENUM, L1RubyNode}; 135 return mach; 136} 137 138inline GenericMachineType 139ConvertMachToGenericMach(MachineType machType) 140{ 141 if (machType == MACHINETYPE_L1CACHE_ENUM) 142 return GenericMachineType_L1Cache; 143 144 if (machType == MACHINETYPE_L2CACHE_ENUM) 145 return GenericMachineType_L2Cache; 146 147 if (machType == MACHINETYPE_L3CACHE_ENUM) 148 return GenericMachineType_L3Cache; 149 150 if (machType == MachineType_Directory) 151 return GenericMachineType_Directory; 152 153 if (machType == MACHINETYPE_DMA_ENUM) 154 return GenericMachineType_DMA; 155 156 panic("cannot convert to a GenericMachineType"); 157} 158 | |
159inline int 160machineCount(MachineType machType) 161{ 162 return MachineType_base_count(machType); 163} 164 165#endif // __MEM_RUBY_SLICC_INTERFACE_COMPONENTMAPPINGS_HH__ | 92inline int 93machineCount(MachineType machType) 94{ 95 return MachineType_base_count(machType); 96} 97 98#endif // __MEM_RUBY_SLICC_INTERFACE_COMPONENTMAPPINGS_HH__ |