1
2/*
3 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

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37#include "mem/ruby/common/Global.hh"
38#include "mem/ruby/config/RubyConfig.hh"
39#include "mem/ruby/system/NodeID.hh"
40#include "mem/ruby/system/MachineID.hh"
41#include "mem/ruby/common/Address.hh"
42#include "mem/ruby/common/Set.hh"
43#include "mem/ruby/common/NetDest.hh"
44#include "mem/protocol/GenericMachineType.hh"
45#include "mem/ruby/system/DirectoryMemory.hh"
46
47#ifdef MACHINETYPE_L1Cache
48#define MACHINETYPE_L1CACHE_ENUM MachineType_L1Cache
49#else
50#define MACHINETYPE_L1CACHE_ENUM MachineType_NUM
51#endif
52
53#ifdef MACHINETYPE_L2Cache
54#define MACHINETYPE_L2CACHE_ENUM MachineType_L2Cache
55#else
56#define MACHINETYPE_L2CACHE_ENUM MachineType_NUM
57#endif
58
59#ifdef MACHINETYPE_L3Cache
60#define MACHINETYPE_L3CACHE_ENUM MachineType_L3Cache
61#else
62#define MACHINETYPE_L3CACHE_ENUM MachineType_NUM
63#endif
64
65/*
66#ifdef MACHINETYPE_PersistentArbiter
67#define MACHINETYPE_PERSISTENTARBITER_ENUM MachineType_PersistentArbiter
68#else
69#define MACHINETYPE_PERSISTENTARBITER_ENUM MachineType_NUM
70#endif
71*/
72/*
73inline MachineID map_Address_to_L2Cache(const Address & addr)
74{
75 int L2bank = 0;
76 MachineID mach = {MACHINETYPE_L2CACHE_ENUM, 0};
77 L2bank = addr.bitSelect(RubySystem::getBlockSizeBits(),
78 RubySystem::getBlockSizeBits() + RubyConfig::getNumberOfCachesPerLevel(2)-1);
79 mach.num = L2bank;
80 return mach;
81}
82
83// input parameter is the base ruby node of the L1 cache
84// returns a value between 0 and total_L2_Caches_within_the_system
85inline
86MachineID map_L1CacheMachId_to_L2Cache(const Address& addr, MachineID L1CacheMachId)
87{
88 return map_Address_to_L2Cache(addr);
89
90 int L2bank = 0;
91 MachineID mach = {MACHINETYPE_L2CACHE_ENUM, 0};
92
93 if (RubyConfig::L2CachePerChipBits() > 0) {
94 if (RubyConfig::getMAP_L2BANKS_TO_LOWEST_BITS()) {
95 L2bank = addr.bitSelect(RubySystem::getBlockSizeBits(),
96 RubySystem::getBlockSizeBits()+RubyConfig::L2CachePerChipBits()-1);
97 } else {
98 L2bank = addr.bitSelect(RubySystem::getBlockSizeBits()+RubyConfig::getL2_CACHE_NUM_SETS_BITS(),
99 RubySystem::getBlockSizeBits()+RubyConfig::getL2_CACHE_NUM_SETS_BITS()+RubyConfig::L2CachePerChipBits()-1);
100 }
101 }
102
103 assert(L2bank < RubyConfig::numberOfL2CachePerChip());
104 assert(L2bank >= 0);
105
106 mach.num = RubyConfig::L1CacheNumToL2Base(L1CacheMachId.num)*RubyConfig::numberOfL2CachePerChip() // base #
107 + L2bank; // bank #
108 assert(mach.num < RubyConfig::numberOfL2Cache());
109 return mach;
110
111}
112
113
114// used to determine the correct L2 bank
115// input parameter is the base ruby node of the L2 cache
116// returns a value between 0 and total_L2_Caches_within_the_system
117
118inline
119MachineID map_L2ChipId_to_L2Cache(const Address& addr, NodeID L2ChipId)
120{
121 return map_Address_to_L2Cache(addr);
122
123 assert(L2ChipId < RubyConfig::numberOfChips());
124
125 int L2bank = 0;
126 MachineID mach = {MACHINETYPE_L2CACHE_ENUM, 0};
127 L2bank = addr.bitSelect(RubySystem::getBlockSizeBits(),
128 RubySystem::getBlockSizeBits() + RubyConfig::numberOfCachesPerLevel(2)-1);
129 mach.num = L2bank;
130 return mach
131
132}
133 */
134
135
136// used to determine the home directory
137// returns a value between 0 and total_directories_within_the_system
138inline
139NodeID map_Address_to_DirectoryNode(const Address& addr)
140{
141 return DirectoryMemory::mapAddressToDirectoryVersion(addr);
142}
143
144// used to determine the home directory
145// returns a value between 0 and total_directories_within_the_system
146inline
147MachineID map_Address_to_Directory(const Address &addr)
148{
149 MachineID mach = {MachineType_Directory, map_Address_to_DirectoryNode(addr)};
150 return mach;
151}
152
153inline
154MachineID map_Address_to_DMA(const Address & addr)
155{
156 MachineID dma = {MachineType_DMA, 0};
157 return dma;
158}
159
160/*
161inline
162NetDest getOtherLocalL1IDs(MachineID L1)
163{
164 int start = (L1.num / RubyConfig::numberOfProcsPerChip()) * RubyConfig::numberOfProcsPerChip();
165 NetDest ret;
166
167 assert(MACHINETYPE_L1CACHE_ENUM != MachineType_NUM);
168
169 for (int i = start; i < (start + RubyConfig::numberOfProcsPerChip()); i++) {
170 if (i != L1.num) {
171 MachineID mach = { MACHINETYPE_L1CACHE_ENUM, i };
172 ret.add( mach );
173 }
174 }
175
176 return ret;
177}
178*/
179
180extern inline NodeID machineIDToNodeID(MachineID machID)
181{
182 // return machID.num%RubyConfig::numberOfChips();
183 return machID.num;
184}
185
186extern inline MachineType machineIDToMachineType(MachineID machID)
187{
188 return machID.type;
189}
190
191extern inline NodeID L1CacheMachIDToProcessorNum(MachineID machID)
192{
193 assert(machID.type == MachineType_L1Cache);
194 return machID.num;
195}
196/*
197extern inline NodeID L2CacheMachIDToChipID(MachineID machID)
198{
199 assert(machID.type == MACHINETYPE_L2CACHE_ENUM);
200 int L2bank = machID.num;
201 int banks_seen = 0;
202 for (int i=0;i<RubyConfig::getNumberOfChips();i++) {
203 for (int j=0;j<RubyConfig::getNumberOfCachesPerLevelPerChip(2,i);j++) {
204 if (banks_seen == L2bank)
205 return i;
206 banks_seen++;
207 }
208 }
209 assert(0);
210}
211*/
212extern inline MachineID getL1MachineID(NodeID L1RubyNode)
213{
214 MachineID mach = {MACHINETYPE_L1CACHE_ENUM, L1RubyNode};
215 return mach;
216}
217
218extern inline GenericMachineType ConvertMachToGenericMach(MachineType machType) {
219 if (machType == MACHINETYPE_L1CACHE_ENUM) {
220 return GenericMachineType_L1Cache;
221 } else if (machType == MACHINETYPE_L2CACHE_ENUM) {
222 return GenericMachineType_L2Cache;
223 } else if (machType == MACHINETYPE_L3CACHE_ENUM) {
224 return GenericMachineType_L3Cache;
225 } else if (machType == MachineType_Directory) {
226 return GenericMachineType_Directory;
227 } else {
228 ERROR_MSG("cannot convert to a GenericMachineType");
229 return GenericMachineType_NULL;
230 }
231}
232
233
234#endif // COMPONENTMAPPINGFNS_H