1#include <iostream> 2 3#include "mem/ruby/slicc_interface/RubyRequest.hh" 4 5using namespace std; 6 7void 8RubyRequest::print(ostream& out) const --- 25 unchanged lines hidden (view full) --- 34{ 35 // This needs a little explanation. I am not sure if this message 36 // should be written. Essentially the question is how are writes 37 // ordered. I am assuming that if a functional write is issued after 38 // a timing write to the same address, then the functional write 39 // has to overwrite the data for the timing request, even if the 40 // timing request has still not been ordered globally. 41 |
42 Addr wBase = pkt->getAddr(); 43 Addr wTail = wBase + pkt->getSize(); 44 Addr mBase = m_PhysicalAddress.getAddress(); 45 Addr mTail = mBase + m_Size; |
46 |
47 uint8_t * pktData = pkt->getPtr<uint8_t>(true); |
48 |
49 Addr cBase = std::max(wBase, mBase); 50 Addr cTail = std::min(wTail, mTail); |
51 |
52 for (Addr i = cBase; i < cTail; ++i) { 53 data[i - mBase] = pktData[i - wBase]; |
54 } |
55 56 return cBase < cTail; |
57} |