1# Copyright (c) 2009 Advanced Micro Devices, Inc. 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 22 unchanged lines hidden (view full) --- 31from ClockedObject import ClockedObject 32 33class RubyController(ClockedObject): 34 type = 'RubyController' 35 cxx_class = 'AbstractController' 36 cxx_header = "mem/ruby/slicc_interface/AbstractController.hh" 37 abstract = True 38 version = Param.Int("") |
39 cluster_id = Param.UInt32(0, "Id of this controller's cluster") 40 |
41 transitions_per_cycle = \ 42 Param.Int(32, "no. of SLICC state machine transitions per cycle") 43 buffer_size = Param.Int(0, "max buffer size 0 means infinite") 44 recycle_latency = Param.Cycles(10, "") 45 number_of_TBEs = Param.Int(256, "") 46 ruby_system = Param.RubySystem("") 47 48 peer = Param.RubyController(NULL, "") |