1# Copyright (c) 2009 Advanced Micro Devices, Inc.
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright
9# notice, this list of conditions and the following disclaimer in the
10# documentation and/or other materials provided with the distribution;
11# neither the name of the copyright holders nor the names of its
12# contributors may be used to endorse or promote products derived from
13# this software without specific prior written permission.
14#
15# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
19# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
21# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26#
27# Authors: Steve Reinhardt
28# Brad Beckmann
29
30from m5.params import *
31from m5.proxy import *
32from MemObject import MemObject
33
34class RubyController(MemObject):
35 type = 'RubyController'
36 cxx_class = 'AbstractController'
37 cxx_header = "mem/ruby/slicc_interface/AbstractController.hh"
38 abstract = True
39 version = Param.Int("")
| 13# Copyright (c) 2009 Advanced Micro Devices, Inc.
14# All rights reserved.
15#
16# Redistribution and use in source and binary forms, with or without
17# modification, are permitted provided that the following conditions are
18# met: redistributions of source code must retain the above copyright
19# notice, this list of conditions and the following disclaimer;
20# redistributions in binary form must reproduce the above copyright
21# notice, this list of conditions and the following disclaimer in the
22# documentation and/or other materials provided with the distribution;
23# neither the name of the copyright holders nor the names of its
24# contributors may be used to endorse or promote products derived from
25# this software without specific prior written permission.
26#
27# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
30# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
31# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
32# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
33# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
34# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
35# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
36# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
37# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38#
39# Authors: Steve Reinhardt
40# Brad Beckmann
41
42from m5.params import *
43from m5.proxy import *
44from MemObject import MemObject
45
46class RubyController(MemObject):
47 type = 'RubyController'
48 cxx_class = 'AbstractController'
49 cxx_header = "mem/ruby/slicc_interface/AbstractController.hh"
50 abstract = True
51 version = Param.Int("")
|
40 cluster_id = Param.UInt32(0, "Id of this controller's cluster")
41
42 transitions_per_cycle = \
43 Param.Int(32, "no. of SLICC state machine transitions per cycle")
44 buffer_size = Param.UInt32(0, "max buffer size 0 means infinite")
45
46 recycle_latency = Param.Cycles(10, "")
47 number_of_TBEs = Param.Int(256, "")
48 ruby_system = Param.RubySystem("")
49
50 memory = MasterPort("Port for attaching a memory controller")
51 system = Param.System(Parent.any, "system object parameter")
| 54 cluster_id = Param.UInt32(0, "Id of this controller's cluster")
55
56 transitions_per_cycle = \
57 Param.Int(32, "no. of SLICC state machine transitions per cycle")
58 buffer_size = Param.UInt32(0, "max buffer size 0 means infinite")
59
60 recycle_latency = Param.Cycles(10, "")
61 number_of_TBEs = Param.Int(256, "")
62 ruby_system = Param.RubySystem("")
63
64 memory = MasterPort("Port for attaching a memory controller")
65 system = Param.System(Parent.any, "system object parameter")
|