AbstractController.cc (13784:1941dc118243) AbstractController.cc (13892:0182a0601f66)
1/*
2 * Copyright (c) 2017 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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44#include "mem/protocol/MemoryMsg.hh"
45#include "mem/ruby/network/Network.hh"
46#include "mem/ruby/system/GPUCoalescer.hh"
47#include "mem/ruby/system/RubySystem.hh"
48#include "mem/ruby/system/Sequencer.hh"
49#include "sim/system.hh"
50
51AbstractController::AbstractController(const Params *p)
1/*
2 * Copyright (c) 2017 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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44#include "mem/protocol/MemoryMsg.hh"
45#include "mem/ruby/network/Network.hh"
46#include "mem/ruby/system/GPUCoalescer.hh"
47#include "mem/ruby/system/RubySystem.hh"
48#include "mem/ruby/system/Sequencer.hh"
49#include "sim/system.hh"
50
51AbstractController::AbstractController(const Params *p)
52 : MemObject(p), Consumer(this), m_version(p->version),
52 : ClockedObject(p), Consumer(this), m_version(p->version),
53 m_clusterID(p->cluster_id),
54 m_masterId(p->system->getMasterId(this)), m_is_blocking(false),
55 m_number_of_TBEs(p->number_of_TBEs),
56 m_transitions_per_cycle(p->transitions_per_cycle),
57 m_buffer_size(p->buffer_size), m_recycle_latency(p->recycle_latency),
58 memoryPort(csprintf("%s.memory", name()), this, ""),
59 addrRanges(p->addr_ranges.begin(), p->addr_ranges.end())
60{

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85 for (uint32_t i = 0; i < size; i++) {
86 m_delayVCHistogram[i]->reset();
87 }
88}
89
90void
91AbstractController::regStats()
92{
53 m_clusterID(p->cluster_id),
54 m_masterId(p->system->getMasterId(this)), m_is_blocking(false),
55 m_number_of_TBEs(p->number_of_TBEs),
56 m_transitions_per_cycle(p->transitions_per_cycle),
57 m_buffer_size(p->buffer_size), m_recycle_latency(p->recycle_latency),
58 memoryPort(csprintf("%s.memory", name()), this, ""),
59 addrRanges(p->addr_ranges.begin(), p->addr_ranges.end())
60{

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85 for (uint32_t i = 0; i < size; i++) {
86 m_delayVCHistogram[i]->reset();
87 }
88}
89
90void
91AbstractController::regStats()
92{
93 MemObject::regStats();
93 ClockedObject::regStats();
94
95 m_fully_busy_cycles
96 .name(name() + ".fully_busy_cycles")
97 .desc("cycles for which number of transistions == max transitions")
98 .flags(Stats::nozero);
99}
100
101void

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95 m_fully_busy_cycles
96 .name(name() + ".fully_busy_cycles")
97 .desc("cycles for which number of transistions == max transitions")
98 .flags(Stats::nozero);
99}
100
101void

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