1/* 2 * Copyright (c) 2017 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 37 unchanged lines hidden (view full) --- 46#include "mem/ruby/system/GPUCoalescer.hh" 47#include "mem/ruby/system/RubySystem.hh" 48#include "mem/ruby/system/Sequencer.hh" 49#include "sim/system.hh" 50 51AbstractController::AbstractController(const Params *p) 52 : MemObject(p), Consumer(this), m_version(p->version), 53 m_clusterID(p->cluster_id), |
54 m_masterId(p->system->getMasterId(this)), m_is_blocking(false), |
55 m_number_of_TBEs(p->number_of_TBEs), 56 m_transitions_per_cycle(p->transitions_per_cycle), 57 m_buffer_size(p->buffer_size), m_recycle_latency(p->recycle_latency), 58 memoryPort(csprintf("%s.memory", name()), this, ""), 59 addrRanges(p->addr_ranges.begin(), p->addr_ranges.end()) 60{ 61 if (m_version == 0) { 62 // Combine the statistics from all controllers --- 330 unchanged lines hidden --- |