1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 21 unchanged lines hidden (view full) ---

30 * Common base class for a machine node.
31 */
32
33#ifndef __MEM_RUBY_SLICC_INTERFACE_ABSTRACTCACHEENTRY_HH__
34#define __MEM_RUBY_SLICC_INTERFACE_ABSTRACTCACHEENTRY_HH__
35
36#include <iostream>
37
38#include "base/misc.hh"
39#include "mem/protocol/AccessPermission.hh"
40#include "mem/ruby/common/Address.hh"
41#include "mem/ruby/slicc_interface/AbstractEntry.hh"
42
43class DataBlock;
44
45class AbstractCacheEntry : public AbstractEntry
46{
47 public:
48 AbstractCacheEntry();
49 virtual ~AbstractCacheEntry() = 0;
50
51 // Get/Set permission of the entry
52 void changePermission(AccessPermission new_perm);
53
54 // The methods below are those called by ruby runtime, add when it
55 // is absolutely necessary and should all be virtual function.
56 virtual DataBlock& getDataBlk()
57 { panic("getDataBlk() not implemented!"); }
58
59
60 Address m_Address; // Address of this block, required by CacheMemory
61 int m_locked; // Holds info whether the address is locked,
62 // required for implementing LL/SC
63};
64
65inline std::ostream&
66operator<<(std::ostream& out, const AbstractCacheEntry& obj)
67{
68 obj.print(out);
69 out << std::flush;
70 return out;
71}
72
73#endif // __MEM_RUBY_SLICC_INTERFACE_ABSTRACTCACHEENTRY_HH__