Profiler.hh (6896:649e40aad897) Profiler.hh (6897:cfeb3d9563dd)
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 65 unchanged lines hidden (view full) ---

74#include "params/RubyProfiler.hh"
75#include "sim/sim_object.hh"
76
77class CacheMsg;
78class AddressProfiler;
79
80template <class KEY_TYPE, class VALUE_TYPE> class Map;
81
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 65 unchanged lines hidden (view full) ---

74#include "params/RubyProfiler.hh"
75#include "sim/sim_object.hh"
76
77class CacheMsg;
78class AddressProfiler;
79
80template <class KEY_TYPE, class VALUE_TYPE> class Map;
81
82struct memory_control_profiler {
83 uint64 m_memReq;
84 uint64 m_memBankBusy;
85 uint64 m_memBusBusy;
86 uint64 m_memTfawBusy;
87 uint64 m_memReadWriteBusy;
88 uint64 m_memDataBusBusy;
89 uint64 m_memRefresh;
90 uint64 m_memRead;
91 uint64 m_memWrite;
92 uint64 m_memWaitCycles;
93 uint64 m_memInputQ;
94 uint64 m_memBankQ;
95 uint64 m_memArbWait;
96 uint64 m_memRandBusy;
97 uint64 m_memNotOld;
98 Vector<uint64> m_memBankCount;
99 int m_banks_per_rank;
100 int m_ranks_per_dimm;
101 int m_dimms_per_channel;
102};
103
104
105class Profiler : public SimObject, public Consumer {
106public:
107 // Constructors
108 typedef RubyProfilerParams Params;
109 Profiler(const Params *);
110
111 // Destructor
112 ~Profiler();

--- 52 unchanged lines hidden (view full) ---

165 void rubyWatch(int proc);
166 bool watchAddress(Address addr);
167
168 // return Ruby's start time
169 Time getRubyStartTime(){
170 return m_ruby_start;
171 }
172
82class Profiler : public SimObject, public Consumer {
83public:
84 // Constructors
85 typedef RubyProfilerParams Params;
86 Profiler(const Params *);
87
88 // Destructor
89 ~Profiler();

--- 52 unchanged lines hidden (view full) ---

142 void rubyWatch(int proc);
143 bool watchAddress(Address addr);
144
145 // return Ruby's start time
146 Time getRubyStartTime(){
147 return m_ruby_start;
148 }
149
173 // added for MemoryControl:
174 void profileMemReq(int mem_cntrl, int bank);
175 void profileMemBankBusy(int mem_cntrl);
176 void profileMemBusBusy(int mem_cntrl);
177 void profileMemTfawBusy(int mem_cntrl);
178 void profileMemReadWriteBusy(int mem_cntrl);
179 void profileMemDataBusBusy(int mem_cntrl);
180 void profileMemRefresh(int mem_cntrl);
181 void profileMemRead(int mem_cntrl);
182 void profileMemWrite(int mem_cntrl);
183 void profileMemWaitCycles(int mem_cntrl, int cycles);
184 void profileMemInputQ(int mem_cntrl, int cycles);
185 void profileMemBankQ(int mem_cntrl, int cycles);
186 void profileMemArbWait(int mem_cntrl, int cycles);
187 void profileMemRandBusy(int mem_cntrl);
188 void profileMemNotOld(int mem_cntrl);
189 //added by SS
190 bool getHotLines() { return m_hot_lines; }
191 bool getAllInstructions() { return m_all_instructions; }
192
193private:
150 //added by SS
151 bool getHotLines() { return m_hot_lines; }
152 bool getAllInstructions() { return m_all_instructions; }
153
154private:
194 //added by SS
195 vector<string> m_memory_control_names;
196
197 // Private copy constructor and assignment operator
198 Profiler(const Profiler& obj);
199 Profiler& operator=(const Profiler& obj);
200
201 // Data Members (m_ prefix)
202 AddressProfiler* m_address_profiler_ptr;
203 AddressProfiler* m_inst_profiler_ptr;

--- 46 unchanged lines hidden (view full) ---

250
251 Histogram m_average_latency_estimate;
252
253 Map<Address, int>* m_watch_address_list_ptr;
254 // counts all initiated cache request including PUTs
255 int m_requests;
256 Map <string, int>* m_requestProfileMap_ptr;
257
155
156 // Private copy constructor and assignment operator
157 Profiler(const Profiler& obj);
158 Profiler& operator=(const Profiler& obj);
159
160 // Data Members (m_ prefix)
161 AddressProfiler* m_address_profiler_ptr;
162 AddressProfiler* m_inst_profiler_ptr;

--- 46 unchanged lines hidden (view full) ---

209
210 Histogram m_average_latency_estimate;
211
212 Map<Address, int>* m_watch_address_list_ptr;
213 // counts all initiated cache request including PUTs
214 int m_requests;
215 Map <string, int>* m_requestProfileMap_ptr;
216
258 // added for MemoryControl:
259 //added by SS
217 //added by SS
260 Vector < memory_control_profiler* > m_mc_profilers;
261
262 //added by SS
263 bool m_hot_lines;
264 bool m_all_instructions;
265
266 int m_num_of_sequencers;
267};
268
269// Output operator declaration
270ostream& operator<<(ostream& out, const Profiler& obj);

--- 15 unchanged lines hidden --- 		218 bool m_hot_lines;
219 bool m_all_instructions;
220
221 int m_num_of_sequencers;
222};
223
224// Output operator declaration
225ostream& operator<<(ostream& out, const Profiler& obj);

--- 15 unchanged lines hidden ---