1/* 2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29/* 30 This file has been modified by Kevin Moore and Dan Nussbaum of the 31 Scalable Systems Research Group at Sun Microsystems Laboratories 32 (http://research.sun.com/scalable/) to support the Adaptive 33 Transactional Memory Test Platform (ATMTP). 34 35 Please send email to atmtp-interest@sun.com with feedback, questions, or 36 to request future announcements about ATMTP. 37 38 ---------------------------------------------------------------------- 39 40 File modification date: 2008-02-23 41 42 ---------------------------------------------------------------------- 43*/ 44 45#ifndef __MEM_RUBY_PROFILER_PROFILER_HH__ 46#define __MEM_RUBY_PROFILER_PROFILER_HH__ 47
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48#include <iostream>
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48#include <map> 49#include <string> 50#include <vector> 51
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52#include "base/callback.hh" |
53#include "base/hashmap.hh"
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54#include "base/statistics.hh" |
55#include "mem/protocol/AccessType.hh" 56#include "mem/protocol/PrefetchBit.hh" 57#include "mem/protocol/RubyAccessMode.hh" 58#include "mem/protocol/RubyRequestType.hh"
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58#include "mem/ruby/common/Address.hh"
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59#include "mem/ruby/common/Global.hh"
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60#include "mem/ruby/common/Histogram.hh"
61#include "mem/ruby/common/Set.hh"
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60#include "mem/ruby/system/MachineID.hh"
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63#include "mem/ruby/system/MemoryControl.hh"
64#include "params/RubyProfiler.hh"
65#include "sim/sim_object.hh"
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61#include "params/RubySystem.hh" |
62 63class RubyRequest; 64class AddressProfiler; 65
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70class Profiler : public SimObject
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66class Profiler |
67{ 68 public:
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73 typedef RubyProfilerParams Params;
74 Profiler(const Params *);
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69 Profiler(const RubySystemParams *); |
70 ~Profiler(); 71 72 void wakeup();
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73 void regStats(const std::string &name); 74 void collateStats(); |
75
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79 void setPeriodicStatsFile(const std::string& filename);
80 void setPeriodicStatsInterval(int64_t period);
81
82 void printStats(std::ostream& out, bool short_stats=false);
83 void printShortStats(std::ostream& out) { printStats(out, true); }
84 void printTraceStats(std::ostream& out) const;
85 void clearStats();
86 void printResourceUsage(std::ostream& out) const;
87
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76 AddressProfiler* getAddressProfiler() { return m_address_profiler_ptr; } 77 AddressProfiler* getInstructionProfiler() { return m_inst_profiler_ptr; } 78 79 void addAddressTraceSample(const RubyRequest& msg, NodeID id); 80
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93 void profileRequest(const std::string& requestStr);
94 void profileSharing(const Address& addr, AccessType type,
95 NodeID requestor, const Set& sharers,
96 const Set& owner);
97
98 void profileMulticastRetry(const Address& addr, int count);
99
100 void profileFilterAction(int action);
101
102 void profileConflictingRequests(const Address& addr);
103
104 void
105 profileAverageLatencyEstimate(int latency)
106 {
107 m_average_latency_estimate.add(latency);
108 }
109
110 void controllerBusy(MachineID machID);
111 void bankBusy();
112
113 void print(std::ostream& out) const;
114
115 void rubyWatch(int proc);
116 bool watchAddress(Address addr);
117
118 // return Ruby's start time
119 Cycles getRubyStartTime() { return m_ruby_start; }
120
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81 // added by SS 82 bool getHotLines() { return m_hot_lines; } 83 bool getAllInstructions() { return m_all_instructions; } 84 85 private:
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126 void printRequestProfile(std::ostream &out) const;
127 void printDelayProfile(std::ostream &out) const;
128 void printOutstandingReqProfile(std::ostream &out) const;
129 void printMissLatencyProfile(std::ostream &out) const;
130
131 private:
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86 // Private copy constructor and assignment operator 87 Profiler(const Profiler& obj); 88 Profiler& operator=(const Profiler& obj); 89 90 AddressProfiler* m_address_profiler_ptr; 91 AddressProfiler* m_inst_profiler_ptr; 92
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139 Cycles m_ruby_start;
140 time_t m_real_time_start_time;
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93 Stats::Histogram delayHistogram; 94 std::vector<Stats::Histogram *> delayVCHistogram; |
95
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142 int64_t m_busyBankCount;
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96 //! Histogram for number of outstanding requests per cycle. 97 Stats::Histogram m_outstandReqHist; |
98
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144 Histogram m_read_sharing_histogram;
145 Histogram m_write_sharing_histogram;
146 Histogram m_all_sharing_histogram;
147 int64 m_cache_to_cache;
148 int64 m_memory_to_cache;
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99 //! Histogram for holding latency profile of all requests. 100 Stats::Histogram m_latencyHist; 101 std::vector<Stats::Histogram *> m_typeLatencyHist; |
102
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150 Histogram m_average_latency_estimate;
151 m5::hash_set<Address> m_watch_address_set;
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103 //! Histogram for holding latency profile of all requests that 104 //! hit in the controller connected to this sequencer. 105 Stats::Histogram m_hitLatencyHist; 106 std::vector<Stats::Histogram *> m_hitTypeLatencyHist; |
107
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108 //! Histograms for profiling the latencies for requests that 109 //! did not required external messages. 110 std::vector<Stats::Histogram *> m_hitMachLatencyHist; 111 std::vector< std::vector<Stats::Histogram *> > m_hitTypeMachLatencyHist; 112 113 //! Histogram for holding latency profile of all requests that 114 //! miss in the controller connected to this sequencer. 115 Stats::Histogram m_missLatencyHist; 116 std::vector<Stats::Histogram *> m_missTypeLatencyHist; 117 118 //! Histograms for profiling the latencies for requests that 119 //! required external messages. 120 std::vector<Stats::Histogram *> m_missMachLatencyHist; 121 std::vector< std::vector<Stats::Histogram *> > m_missTypeMachLatencyHist; 122 123 //! Histograms for recording the breakdown of miss latency 124 std::vector<Stats::Histogram *> m_IssueToInitialDelayHist; 125 std::vector<Stats::Histogram *> m_InitialToForwardDelayHist; 126 std::vector<Stats::Histogram *> m_ForwardToFirstResponseDelayHist; 127 std::vector<Stats::Histogram *> m_FirstResponseToCompletionDelayHist; 128 std::vector<Stats::Scalar> m_IncompleteTimes; 129 |
130 //added by SS 131 bool m_hot_lines; 132 bool m_all_instructions;
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156
157 int m_num_of_sequencers;
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133}; 134
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160inline std::ostream&
161operator<<(std::ostream& out, const Profiler& obj)
162{
163 obj.print(out);
164 out << std::flush;
165 return out;
166}
167
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135#endif // __MEM_RUBY_PROFILER_PROFILER_HH__
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