1/* 2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 124 unchanged lines hidden (view full) --- 133 134 void controllerBusy(MachineID machID); 135 void bankBusy(); 136 137 void missLatency(Time t, 138 RubyRequestType type, 139 const GenericMachineType respondingMach); 140 |
141 void missLatencyWcc(Time issuedTime, 142 Time initialRequestTime, 143 Time forwardRequestTime, 144 Time firstResponseTime, 145 Time completionTime); 146 147 void missLatencyDir(Time issuedTime, 148 Time initialRequestTime, 149 Time forwardRequestTime, 150 Time firstResponseTime, 151 Time completionTime); 152 |
153 void swPrefetchLatency(Time t, 154 CacheRequestType type, 155 const GenericMachineType respondingMach); 156 157 void sequencerRequests(int num) { m_sequencer_requests.add(num); } 158 159 void profileTransition(const std::string& component, NodeID version, 160 Address addr, const std::string& state, const std::string& event, --- 46 unchanged lines hidden (view full) --- 207 Histogram m_all_sharing_histogram; 208 int64 m_cache_to_cache; 209 int64 m_memory_to_cache; 210 211 Histogram m_prefetchWaitHistogram; 212 213 std::vector<Histogram> m_missLatencyHistograms; 214 std::vector<Histogram> m_machLatencyHistograms; |
215 std::vector< std::vector<Histogram> > m_missMachLatencyHistograms; 216 Histogram m_wCCIssueToInitialRequestHistogram; 217 Histogram m_wCCInitialRequestToForwardRequestHistogram; 218 Histogram m_wCCForwardRequestToFirstResponseHistogram; 219 Histogram m_wCCFirstResponseToCompleteHistogram; 220 int64 m_wCCIncompleteTimes; 221 Histogram m_dirIssueToInitialRequestHistogram; 222 Histogram m_dirInitialRequestToForwardRequestHistogram; 223 Histogram m_dirForwardRequestToFirstResponseHistogram; 224 Histogram m_dirFirstResponseToCompleteHistogram; 225 int64 m_dirIncompleteTimes; 226 |
227 Histogram m_allMissLatencyHistogram; 228 229 Histogram m_allSWPrefetchLatencyHistogram; 230 Histogram m_SWPrefetchL2MissLatencyHistogram; 231 std::vector<Histogram> m_SWPrefetchLatencyHistograms; 232 std::vector<Histogram> m_SWPrefetchMachLatencyHistograms; 233 234 Histogram m_delayedCyclesHistogram; --- 31 unchanged lines hidden --- |