1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/*
30 This file has been modified by Kevin Moore and Dan Nussbaum of the
31 Scalable Systems Research Group at Sun Microsystems Laboratories
32 (http://research.sun.com/scalable/) to support the Adaptive
33 Transactional Memory Test Platform (ATMTP).
34
35 Please send email to atmtp-interest@sun.com with feedback, questions, or
36 to request future announcements about ATMTP.
37
38 ----------------------------------------------------------------------
39
40 File modification date: 2008-02-23
41
42 ----------------------------------------------------------------------
43*/
44
45#ifndef __MEM_RUBY_PROFILER_PROFILER_HH__
46#define __MEM_RUBY_PROFILER_PROFILER_HH__
47
48#include <iostream>
49#include <map>
50#include <string>
51#include <vector>
52
53#include "base/hashmap.hh"
54#include "mem/protocol/AccessType.hh"
55#include "mem/protocol/GenericMachineType.hh"
56#include "mem/protocol/GenericRequestType.hh"
57#include "mem/protocol/PrefetchBit.hh"
58#include "mem/protocol/RubyAccessMode.hh"
59#include "mem/protocol/RubyRequestType.hh"
60#include "mem/ruby/common/Address.hh"
61#include "mem/ruby/common/Global.hh"
62#include "mem/ruby/common/Histogram.hh"
63#include "mem/ruby/common/Set.hh"
64#include "mem/ruby/system/MachineID.hh"
65#include "mem/ruby/system/MemoryControl.hh"
66#include "params/RubyProfiler.hh"
67#include "sim/sim_object.hh"
68
69class RubyRequest;
70class AddressProfiler;
71
72class Profiler : public SimObject
73{
74 public:
75 typedef RubyProfilerParams Params;
76 Profiler(const Params *);
77 ~Profiler();
78
79 void wakeup();
80
81 void setPeriodicStatsFile(const std::string& filename);
82 void setPeriodicStatsInterval(int64_t period);
83
84 void printStats(std::ostream& out, bool short_stats=false);
85 void printShortStats(std::ostream& out) { printStats(out, true); }
86 void printTraceStats(std::ostream& out) const;
87 void clearStats();
88 void printResourceUsage(std::ostream& out) const;
89
90 AddressProfiler* getAddressProfiler() { return m_address_profiler_ptr; }
91 AddressProfiler* getInstructionProfiler() { return m_inst_profiler_ptr; }
92
93 void addAddressTraceSample(const RubyRequest& msg, NodeID id);
94
95 void profileRequest(const std::string& requestStr);
96 void profileSharing(const Address& addr, AccessType type,
97 NodeID requestor, const Set& sharers,
98 const Set& owner);
99
100 void profileMulticastRetry(const Address& addr, int count);
101
102 void profileFilterAction(int action);
103
104 void profileConflictingRequests(const Address& addr);
105
106 void
107 profileOutstandingRequest(int outstanding)
108 {
109 m_outstanding_requests.add(outstanding);
110 }
111
112 void
113 profileOutstandingPersistentRequest(int outstanding)
114 {
115 m_outstanding_persistent_requests.add(outstanding);
116 }
117
118 void
119 profileAverageLatencyEstimate(int latency)
120 {
121 m_average_latency_estimate.add(latency);
122 }
123
124 void recordPrediction(bool wasGood, bool wasPredicted);
125
126 void startTransaction(int cpu);
127 void endTransaction(int cpu);
128 void profilePFWait(Time waitTime);
129
130 void controllerBusy(MachineID machID);
131 void bankBusy();
132
133 void missLatency(Time t,
134 RubyRequestType type,
135 const GenericMachineType respondingMach);
136
137 void missLatencyWcc(Time issuedTime,
138 Time initialRequestTime,
139 Time forwardRequestTime,
140 Time firstResponseTime,
141 Time completionTime);
142
143 void missLatencyDir(Time issuedTime,
144 Time initialRequestTime,
145 Time forwardRequestTime,
146 Time firstResponseTime,
147 Time completionTime);
148
149 void swPrefetchLatency(Time t,
150 RubyRequestType type,
151 const GenericMachineType respondingMach);
152
153 void sequencerRequests(int num) { m_sequencer_requests.add(num); }
154
| 1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/*
30 This file has been modified by Kevin Moore and Dan Nussbaum of the
31 Scalable Systems Research Group at Sun Microsystems Laboratories
32 (http://research.sun.com/scalable/) to support the Adaptive
33 Transactional Memory Test Platform (ATMTP).
34
35 Please send email to atmtp-interest@sun.com with feedback, questions, or
36 to request future announcements about ATMTP.
37
38 ----------------------------------------------------------------------
39
40 File modification date: 2008-02-23
41
42 ----------------------------------------------------------------------
43*/
44
45#ifndef __MEM_RUBY_PROFILER_PROFILER_HH__
46#define __MEM_RUBY_PROFILER_PROFILER_HH__
47
48#include <iostream>
49#include <map>
50#include <string>
51#include <vector>
52
53#include "base/hashmap.hh"
54#include "mem/protocol/AccessType.hh"
55#include "mem/protocol/GenericMachineType.hh"
56#include "mem/protocol/GenericRequestType.hh"
57#include "mem/protocol/PrefetchBit.hh"
58#include "mem/protocol/RubyAccessMode.hh"
59#include "mem/protocol/RubyRequestType.hh"
60#include "mem/ruby/common/Address.hh"
61#include "mem/ruby/common/Global.hh"
62#include "mem/ruby/common/Histogram.hh"
63#include "mem/ruby/common/Set.hh"
64#include "mem/ruby/system/MachineID.hh"
65#include "mem/ruby/system/MemoryControl.hh"
66#include "params/RubyProfiler.hh"
67#include "sim/sim_object.hh"
68
69class RubyRequest;
70class AddressProfiler;
71
72class Profiler : public SimObject
73{
74 public:
75 typedef RubyProfilerParams Params;
76 Profiler(const Params *);
77 ~Profiler();
78
79 void wakeup();
80
81 void setPeriodicStatsFile(const std::string& filename);
82 void setPeriodicStatsInterval(int64_t period);
83
84 void printStats(std::ostream& out, bool short_stats=false);
85 void printShortStats(std::ostream& out) { printStats(out, true); }
86 void printTraceStats(std::ostream& out) const;
87 void clearStats();
88 void printResourceUsage(std::ostream& out) const;
89
90 AddressProfiler* getAddressProfiler() { return m_address_profiler_ptr; }
91 AddressProfiler* getInstructionProfiler() { return m_inst_profiler_ptr; }
92
93 void addAddressTraceSample(const RubyRequest& msg, NodeID id);
94
95 void profileRequest(const std::string& requestStr);
96 void profileSharing(const Address& addr, AccessType type,
97 NodeID requestor, const Set& sharers,
98 const Set& owner);
99
100 void profileMulticastRetry(const Address& addr, int count);
101
102 void profileFilterAction(int action);
103
104 void profileConflictingRequests(const Address& addr);
105
106 void
107 profileOutstandingRequest(int outstanding)
108 {
109 m_outstanding_requests.add(outstanding);
110 }
111
112 void
113 profileOutstandingPersistentRequest(int outstanding)
114 {
115 m_outstanding_persistent_requests.add(outstanding);
116 }
117
118 void
119 profileAverageLatencyEstimate(int latency)
120 {
121 m_average_latency_estimate.add(latency);
122 }
123
124 void recordPrediction(bool wasGood, bool wasPredicted);
125
126 void startTransaction(int cpu);
127 void endTransaction(int cpu);
128 void profilePFWait(Time waitTime);
129
130 void controllerBusy(MachineID machID);
131 void bankBusy();
132
133 void missLatency(Time t,
134 RubyRequestType type,
135 const GenericMachineType respondingMach);
136
137 void missLatencyWcc(Time issuedTime,
138 Time initialRequestTime,
139 Time forwardRequestTime,
140 Time firstResponseTime,
141 Time completionTime);
142
143 void missLatencyDir(Time issuedTime,
144 Time initialRequestTime,
145 Time forwardRequestTime,
146 Time firstResponseTime,
147 Time completionTime);
148
149 void swPrefetchLatency(Time t,
150 RubyRequestType type,
151 const GenericMachineType respondingMach);
152
153 void sequencerRequests(int num) { m_sequencer_requests.add(num); }
154
|