1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/*
30 This file has been modified by Kevin Moore and Dan Nussbaum of the
31 Scalable Systems Research Group at Sun Microsystems Laboratories
32 (http://research.sun.com/scalable/) to support the Adaptive
33 Transactional Memory Test Platform (ATMTP).
34
35 Please send email to atmtp-interest@sun.com with feedback, questions, or
36 to request future announcements about ATMTP.
37
38 ----------------------------------------------------------------------
39
40 File modification date: 2008-02-23
41
42 ----------------------------------------------------------------------
43*/
44
45#ifndef __MEM_RUBY_PROFILER_PROFILER_HH__
46#define __MEM_RUBY_PROFILER_PROFILER_HH__
47
48#include <iostream>
49#include <map>
50#include <string>
51#include <vector>
52
53#include "base/hashmap.hh"
54#include "mem/protocol/AccessType.hh"
55#include "mem/protocol/GenericMachineType.hh"
56#include "mem/protocol/GenericRequestType.hh"
57#include "mem/protocol/PrefetchBit.hh"
58#include "mem/protocol/RubyAccessMode.hh"
59#include "mem/protocol/RubyRequestType.hh"
60#include "mem/ruby/common/Address.hh"
| 1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/*
30 This file has been modified by Kevin Moore and Dan Nussbaum of the
31 Scalable Systems Research Group at Sun Microsystems Laboratories
32 (http://research.sun.com/scalable/) to support the Adaptive
33 Transactional Memory Test Platform (ATMTP).
34
35 Please send email to atmtp-interest@sun.com with feedback, questions, or
36 to request future announcements about ATMTP.
37
38 ----------------------------------------------------------------------
39
40 File modification date: 2008-02-23
41
42 ----------------------------------------------------------------------
43*/
44
45#ifndef __MEM_RUBY_PROFILER_PROFILER_HH__
46#define __MEM_RUBY_PROFILER_PROFILER_HH__
47
48#include <iostream>
49#include <map>
50#include <string>
51#include <vector>
52
53#include "base/hashmap.hh"
54#include "mem/protocol/AccessType.hh"
55#include "mem/protocol/GenericMachineType.hh"
56#include "mem/protocol/GenericRequestType.hh"
57#include "mem/protocol/PrefetchBit.hh"
58#include "mem/protocol/RubyAccessMode.hh"
59#include "mem/protocol/RubyRequestType.hh"
60#include "mem/ruby/common/Address.hh"
|
61#include "mem/ruby/common/Consumer.hh"
| |
62#include "mem/ruby/common/Global.hh"
63#include "mem/ruby/common/Histogram.hh"
64#include "mem/ruby/common/Set.hh"
65#include "mem/ruby/system/MachineID.hh"
66#include "mem/ruby/system/MemoryControl.hh"
67#include "params/RubyProfiler.hh"
68#include "sim/sim_object.hh"
69
70class RubyRequest;
71class AddressProfiler;
72
| 61#include "mem/ruby/common/Global.hh"
62#include "mem/ruby/common/Histogram.hh"
63#include "mem/ruby/common/Set.hh"
64#include "mem/ruby/system/MachineID.hh"
65#include "mem/ruby/system/MemoryControl.hh"
66#include "params/RubyProfiler.hh"
67#include "sim/sim_object.hh"
68
69class RubyRequest;
70class AddressProfiler;
71
|
73class Profiler : public SimObject, public Consumer
| 72class Profiler : public SimObject
|
74{
75 public:
76 typedef RubyProfilerParams Params;
77 Profiler(const Params *);
78 ~Profiler();
79
80 void wakeup();
81
82 void setPeriodicStatsFile(const std::string& filename);
83 void setPeriodicStatsInterval(integer_t period);
84
85 void printStats(std::ostream& out, bool short_stats=false);
86 void printShortStats(std::ostream& out) { printStats(out, true); }
87 void printTraceStats(std::ostream& out) const;
88 void clearStats();
89 void printResourceUsage(std::ostream& out) const;
90
91 AddressProfiler* getAddressProfiler() { return m_address_profiler_ptr; }
92 AddressProfiler* getInstructionProfiler() { return m_inst_profiler_ptr; }
93
94 void addAddressTraceSample(const RubyRequest& msg, NodeID id);
95
96 void profileRequest(const std::string& requestStr);
97 void profileSharing(const Address& addr, AccessType type,
98 NodeID requestor, const Set& sharers,
99 const Set& owner);
100
101 void profileMulticastRetry(const Address& addr, int count);
102
103 void profileFilterAction(int action);
104
105 void profileConflictingRequests(const Address& addr);
106
107 void
108 profileOutstandingRequest(int outstanding)
109 {
110 m_outstanding_requests.add(outstanding);
111 }
112
113 void
114 profileOutstandingPersistentRequest(int outstanding)
115 {
116 m_outstanding_persistent_requests.add(outstanding);
117 }
118
119 void
120 profileAverageLatencyEstimate(int latency)
121 {
122 m_average_latency_estimate.add(latency);
123 }
124
125 void recordPrediction(bool wasGood, bool wasPredicted);
126
127 void startTransaction(int cpu);
128 void endTransaction(int cpu);
129 void profilePFWait(Time waitTime);
130
131 void controllerBusy(MachineID machID);
132 void bankBusy();
133
134 void missLatency(Time t,
135 RubyRequestType type,
136 const GenericMachineType respondingMach);
137
138 void missLatencyWcc(Time issuedTime,
139 Time initialRequestTime,
140 Time forwardRequestTime,
141 Time firstResponseTime,
142 Time completionTime);
143
144 void missLatencyDir(Time issuedTime,
145 Time initialRequestTime,
146 Time forwardRequestTime,
147 Time firstResponseTime,
148 Time completionTime);
149
150 void swPrefetchLatency(Time t,
151 RubyRequestType type,
152 const GenericMachineType respondingMach);
153
154 void sequencerRequests(int num) { m_sequencer_requests.add(num); }
155
156 void profileMsgDelay(int virtualNetwork, int delayCycles);
157
158 void print(std::ostream& out) const;
159
160 void rubyWatch(int proc);
161 bool watchAddress(Address addr);
162
163 // return Ruby's start time
164 Time
165 getRubyStartTime()
166 {
167 return m_ruby_start;
168 }
169
170 // added by SS
171 bool getHotLines() { return m_hot_lines; }
172 bool getAllInstructions() { return m_all_instructions; }
173
174 private:
175 // Private copy constructor and assignment operator
176 Profiler(const Profiler& obj);
177 Profiler& operator=(const Profiler& obj);
178
179 AddressProfiler* m_address_profiler_ptr;
180 AddressProfiler* m_inst_profiler_ptr;
181
182 std::vector<int64> m_instructions_executed_at_start;
183 std::vector<int64> m_cycles_executed_at_start;
184
185 std::ostream* m_periodic_output_file_ptr;
186 integer_t m_stats_period;
187
188 Time m_ruby_start;
189 time_t m_real_time_start_time;
190
191 std::vector<std::vector<integer_t> > m_busyControllerCount;
192 integer_t m_busyBankCount;
193 Histogram m_multicast_retry_histogram;
194
195 Histogram m_filter_action_histogram;
196 Histogram m_tbeProfile;
197
198 Histogram m_sequencer_requests;
199 Histogram m_read_sharing_histogram;
200 Histogram m_write_sharing_histogram;
201 Histogram m_all_sharing_histogram;
202 int64 m_cache_to_cache;
203 int64 m_memory_to_cache;
204
205 Histogram m_prefetchWaitHistogram;
206
207 std::vector<Histogram> m_missLatencyHistograms;
208 std::vector<Histogram> m_machLatencyHistograms;
209 std::vector< std::vector<Histogram> > m_missMachLatencyHistograms;
210 Histogram m_wCCIssueToInitialRequestHistogram;
211 Histogram m_wCCInitialRequestToForwardRequestHistogram;
212 Histogram m_wCCForwardRequestToFirstResponseHistogram;
213 Histogram m_wCCFirstResponseToCompleteHistogram;
214 int64 m_wCCIncompleteTimes;
215 Histogram m_dirIssueToInitialRequestHistogram;
216 Histogram m_dirInitialRequestToForwardRequestHistogram;
217 Histogram m_dirForwardRequestToFirstResponseHistogram;
218 Histogram m_dirFirstResponseToCompleteHistogram;
219 int64 m_dirIncompleteTimes;
220
221 Histogram m_allMissLatencyHistogram;
222
223 Histogram m_allSWPrefetchLatencyHistogram;
224 Histogram m_SWPrefetchL2MissLatencyHistogram;
225 std::vector<Histogram> m_SWPrefetchLatencyHistograms;
226 std::vector<Histogram> m_SWPrefetchMachLatencyHistograms;
227
228 Histogram m_delayedCyclesHistogram;
229 Histogram m_delayedCyclesNonPFHistogram;
230 std::vector<Histogram> m_delayedCyclesVCHistograms;
231
232 Histogram m_outstanding_requests;
233 Histogram m_outstanding_persistent_requests;
234
235 Histogram m_average_latency_estimate;
236
237 m5::hash_set<Address> m_watch_address_set;
238 // counts all initiated cache request including PUTs
239 int m_requests;
240 std::map<std::string, int> m_requestProfileMap;
241
242 //added by SS
243 bool m_hot_lines;
244 bool m_all_instructions;
245
246 int m_num_of_sequencers;
| 73{
74 public:
75 typedef RubyProfilerParams Params;
76 Profiler(const Params *);
77 ~Profiler();
78
79 void wakeup();
80
81 void setPeriodicStatsFile(const std::string& filename);
82 void setPeriodicStatsInterval(integer_t period);
83
84 void printStats(std::ostream& out, bool short_stats=false);
85 void printShortStats(std::ostream& out) { printStats(out, true); }
86 void printTraceStats(std::ostream& out) const;
87 void clearStats();
88 void printResourceUsage(std::ostream& out) const;
89
90 AddressProfiler* getAddressProfiler() { return m_address_profiler_ptr; }
91 AddressProfiler* getInstructionProfiler() { return m_inst_profiler_ptr; }
92
93 void addAddressTraceSample(const RubyRequest& msg, NodeID id);
94
95 void profileRequest(const std::string& requestStr);
96 void profileSharing(const Address& addr, AccessType type,
97 NodeID requestor, const Set& sharers,
98 const Set& owner);
99
100 void profileMulticastRetry(const Address& addr, int count);
101
102 void profileFilterAction(int action);
103
104 void profileConflictingRequests(const Address& addr);
105
106 void
107 profileOutstandingRequest(int outstanding)
108 {
109 m_outstanding_requests.add(outstanding);
110 }
111
112 void
113 profileOutstandingPersistentRequest(int outstanding)
114 {
115 m_outstanding_persistent_requests.add(outstanding);
116 }
117
118 void
119 profileAverageLatencyEstimate(int latency)
120 {
121 m_average_latency_estimate.add(latency);
122 }
123
124 void recordPrediction(bool wasGood, bool wasPredicted);
125
126 void startTransaction(int cpu);
127 void endTransaction(int cpu);
128 void profilePFWait(Time waitTime);
129
130 void controllerBusy(MachineID machID);
131 void bankBusy();
132
133 void missLatency(Time t,
134 RubyRequestType type,
135 const GenericMachineType respondingMach);
136
137 void missLatencyWcc(Time issuedTime,
138 Time initialRequestTime,
139 Time forwardRequestTime,
140 Time firstResponseTime,
141 Time completionTime);
142
143 void missLatencyDir(Time issuedTime,
144 Time initialRequestTime,
145 Time forwardRequestTime,
146 Time firstResponseTime,
147 Time completionTime);
148
149 void swPrefetchLatency(Time t,
150 RubyRequestType type,
151 const GenericMachineType respondingMach);
152
153 void sequencerRequests(int num) { m_sequencer_requests.add(num); }
154
155 void profileMsgDelay(int virtualNetwork, int delayCycles);
156
157 void print(std::ostream& out) const;
158
159 void rubyWatch(int proc);
160 bool watchAddress(Address addr);
161
162 // return Ruby's start time
163 Time
164 getRubyStartTime()
165 {
166 return m_ruby_start;
167 }
168
169 // added by SS
170 bool getHotLines() { return m_hot_lines; }
171 bool getAllInstructions() { return m_all_instructions; }
172
173 private:
174 // Private copy constructor and assignment operator
175 Profiler(const Profiler& obj);
176 Profiler& operator=(const Profiler& obj);
177
178 AddressProfiler* m_address_profiler_ptr;
179 AddressProfiler* m_inst_profiler_ptr;
180
181 std::vector<int64> m_instructions_executed_at_start;
182 std::vector<int64> m_cycles_executed_at_start;
183
184 std::ostream* m_periodic_output_file_ptr;
185 integer_t m_stats_period;
186
187 Time m_ruby_start;
188 time_t m_real_time_start_time;
189
190 std::vector<std::vector<integer_t> > m_busyControllerCount;
191 integer_t m_busyBankCount;
192 Histogram m_multicast_retry_histogram;
193
194 Histogram m_filter_action_histogram;
195 Histogram m_tbeProfile;
196
197 Histogram m_sequencer_requests;
198 Histogram m_read_sharing_histogram;
199 Histogram m_write_sharing_histogram;
200 Histogram m_all_sharing_histogram;
201 int64 m_cache_to_cache;
202 int64 m_memory_to_cache;
203
204 Histogram m_prefetchWaitHistogram;
205
206 std::vector<Histogram> m_missLatencyHistograms;
207 std::vector<Histogram> m_machLatencyHistograms;
208 std::vector< std::vector<Histogram> > m_missMachLatencyHistograms;
209 Histogram m_wCCIssueToInitialRequestHistogram;
210 Histogram m_wCCInitialRequestToForwardRequestHistogram;
211 Histogram m_wCCForwardRequestToFirstResponseHistogram;
212 Histogram m_wCCFirstResponseToCompleteHistogram;
213 int64 m_wCCIncompleteTimes;
214 Histogram m_dirIssueToInitialRequestHistogram;
215 Histogram m_dirInitialRequestToForwardRequestHistogram;
216 Histogram m_dirForwardRequestToFirstResponseHistogram;
217 Histogram m_dirFirstResponseToCompleteHistogram;
218 int64 m_dirIncompleteTimes;
219
220 Histogram m_allMissLatencyHistogram;
221
222 Histogram m_allSWPrefetchLatencyHistogram;
223 Histogram m_SWPrefetchL2MissLatencyHistogram;
224 std::vector<Histogram> m_SWPrefetchLatencyHistograms;
225 std::vector<Histogram> m_SWPrefetchMachLatencyHistograms;
226
227 Histogram m_delayedCyclesHistogram;
228 Histogram m_delayedCyclesNonPFHistogram;
229 std::vector<Histogram> m_delayedCyclesVCHistograms;
230
231 Histogram m_outstanding_requests;
232 Histogram m_outstanding_persistent_requests;
233
234 Histogram m_average_latency_estimate;
235
236 m5::hash_set<Address> m_watch_address_set;
237 // counts all initiated cache request including PUTs
238 int m_requests;
239 std::map<std::string, int> m_requestProfileMap;
240
241 //added by SS
242 bool m_hot_lines;
243 bool m_all_instructions;
244
245 int m_num_of_sequencers;
|
| 246
247 protected:
248 class ProfileEvent : public Event
249 {
250 public:
251 ProfileEvent(Profiler *_profiler)
252 {
253 profiler = _profiler;
254 }
255 private:
256 void process() { profiler->wakeup(); }
257 Profiler *profiler;
258 };
259 ProfileEvent m_event;
|
247};
248
249inline std::ostream&
250operator<<(std::ostream& out, const Profiler& obj)
251{
252 obj.print(out);
253 out << std::flush;
254 return out;
255}
256
257#endif // __MEM_RUBY_PROFILER_PROFILER_HH__
| 260};
261
262inline std::ostream&
263operator<<(std::ostream& out, const Profiler& obj)
264{
265 obj.print(out);
266 out << std::flush;
267 return out;
268}
269
270#endif // __MEM_RUBY_PROFILER_PROFILER_HH__
|
258
259
| |
| |