Profiler.hh (8229:78bf55f23338) Profiler.hh (8608:02d7ac5fb855)
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/*
30 This file has been modified by Kevin Moore and Dan Nussbaum of the
31 Scalable Systems Research Group at Sun Microsystems Laboratories
32 (http://research.sun.com/scalable/) to support the Adaptive
33 Transactional Memory Test Platform (ATMTP).
34
35 Please send email to atmtp-interest@sun.com with feedback, questions, or
36 to request future announcements about ATMTP.
37
38 ----------------------------------------------------------------------
39
40 File modification date: 2008-02-23
41
42 ----------------------------------------------------------------------
43*/
44
45#ifndef __MEM_RUBY_PROFILER_PROFILER_HH__
46#define __MEM_RUBY_PROFILER_PROFILER_HH__
47
48#include <iostream>
49#include <map>
50#include <string>
51#include <vector>
52
53#include "base/hashmap.hh"
54#include "mem/protocol/AccessType.hh"
55#include "mem/protocol/GenericMachineType.hh"
56#include "mem/protocol/GenericRequestType.hh"
57#include "mem/protocol/PrefetchBit.hh"
58#include "mem/protocol/RubyAccessMode.hh"
59#include "mem/protocol/RubyRequestType.hh"
60#include "mem/ruby/common/Address.hh"
61#include "mem/ruby/common/Consumer.hh"
62#include "mem/ruby/common/Global.hh"
63#include "mem/ruby/common/Histogram.hh"
64#include "mem/ruby/common/Set.hh"
65#include "mem/ruby/system/MachineID.hh"
66#include "mem/ruby/system/MemoryControl.hh"
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/*
30 This file has been modified by Kevin Moore and Dan Nussbaum of the
31 Scalable Systems Research Group at Sun Microsystems Laboratories
32 (http://research.sun.com/scalable/) to support the Adaptive
33 Transactional Memory Test Platform (ATMTP).
34
35 Please send email to atmtp-interest@sun.com with feedback, questions, or
36 to request future announcements about ATMTP.
37
38 ----------------------------------------------------------------------
39
40 File modification date: 2008-02-23
41
42 ----------------------------------------------------------------------
43*/
44
45#ifndef __MEM_RUBY_PROFILER_PROFILER_HH__
46#define __MEM_RUBY_PROFILER_PROFILER_HH__
47
48#include <iostream>
49#include <map>
50#include <string>
51#include <vector>
52
53#include "base/hashmap.hh"
54#include "mem/protocol/AccessType.hh"
55#include "mem/protocol/GenericMachineType.hh"
56#include "mem/protocol/GenericRequestType.hh"
57#include "mem/protocol/PrefetchBit.hh"
58#include "mem/protocol/RubyAccessMode.hh"
59#include "mem/protocol/RubyRequestType.hh"
60#include "mem/ruby/common/Address.hh"
61#include "mem/ruby/common/Consumer.hh"
62#include "mem/ruby/common/Global.hh"
63#include "mem/ruby/common/Histogram.hh"
64#include "mem/ruby/common/Set.hh"
65#include "mem/ruby/system/MachineID.hh"
66#include "mem/ruby/system/MemoryControl.hh"
67#include "mem/ruby/system/NodeID.hh"
68#include "params/RubyProfiler.hh"
69#include "sim/sim_object.hh"
70
71class RubyRequest;
72class AddressProfiler;
73
74class Profiler : public SimObject, public Consumer
75{
76 public:
77 typedef RubyProfilerParams Params;
78 Profiler(const Params *);
79 ~Profiler();
80
81 void wakeup();
82
83 void setPeriodicStatsFile(const std::string& filename);
84 void setPeriodicStatsInterval(integer_t period);
85
86 void printStats(std::ostream& out, bool short_stats=false);
87 void printShortStats(std::ostream& out) { printStats(out, true); }
88 void printTraceStats(std::ostream& out) const;
89 void clearStats();
90 void printConfig(std::ostream& out) const;
91 void printResourceUsage(std::ostream& out) const;
92
93 AddressProfiler* getAddressProfiler() { return m_address_profiler_ptr; }
94 AddressProfiler* getInstructionProfiler() { return m_inst_profiler_ptr; }
95
96 void addAddressTraceSample(const RubyRequest& msg, NodeID id);
97
98 void profileRequest(const std::string& requestStr);
99 void profileSharing(const Address& addr, AccessType type,
100 NodeID requestor, const Set& sharers,
101 const Set& owner);
102
103 void profileMulticastRetry(const Address& addr, int count);
104
105 void profileFilterAction(int action);
106
107 void profileConflictingRequests(const Address& addr);
108
109 void
110 profileOutstandingRequest(int outstanding)
111 {
112 m_outstanding_requests.add(outstanding);
113 }
114
115 void
116 profileOutstandingPersistentRequest(int outstanding)
117 {
118 m_outstanding_persistent_requests.add(outstanding);
119 }
120
121 void
122 profileAverageLatencyEstimate(int latency)
123 {
124 m_average_latency_estimate.add(latency);
125 }
126
127 void recordPrediction(bool wasGood, bool wasPredicted);
128
129 void startTransaction(int cpu);
130 void endTransaction(int cpu);
131 void profilePFWait(Time waitTime);
132
133 void controllerBusy(MachineID machID);
134 void bankBusy();
135
136 void missLatency(Time t,
137 RubyRequestType type,
138 const GenericMachineType respondingMach);
139
140 void missLatencyWcc(Time issuedTime,
141 Time initialRequestTime,
142 Time forwardRequestTime,
143 Time firstResponseTime,
144 Time completionTime);
145
146 void missLatencyDir(Time issuedTime,
147 Time initialRequestTime,
148 Time forwardRequestTime,
149 Time firstResponseTime,
150 Time completionTime);
151
152 void swPrefetchLatency(Time t,
153 RubyRequestType type,
154 const GenericMachineType respondingMach);
155
156 void sequencerRequests(int num) { m_sequencer_requests.add(num); }
157
158 void profileMsgDelay(int virtualNetwork, int delayCycles);
159
160 void print(std::ostream& out) const;
161
162 void rubyWatch(int proc);
163 bool watchAddress(Address addr);
164
165 // return Ruby's start time
166 Time
167 getRubyStartTime()
168 {
169 return m_ruby_start;
170 }
171
172 // added by SS
173 bool getHotLines() { return m_hot_lines; }
174 bool getAllInstructions() { return m_all_instructions; }
175
176 private:
177 // Private copy constructor and assignment operator
178 Profiler(const Profiler& obj);
179 Profiler& operator=(const Profiler& obj);
180
181 AddressProfiler* m_address_profiler_ptr;
182 AddressProfiler* m_inst_profiler_ptr;
183
184 std::vector<int64> m_instructions_executed_at_start;
185 std::vector<int64> m_cycles_executed_at_start;
186
187 std::ostream* m_periodic_output_file_ptr;
188 integer_t m_stats_period;
189
190 Time m_ruby_start;
191 time_t m_real_time_start_time;
192
193 std::vector<std::vector<integer_t> > m_busyControllerCount;
194 integer_t m_busyBankCount;
195 Histogram m_multicast_retry_histogram;
196
197 Histogram m_filter_action_histogram;
198 Histogram m_tbeProfile;
199
200 Histogram m_sequencer_requests;
201 Histogram m_read_sharing_histogram;
202 Histogram m_write_sharing_histogram;
203 Histogram m_all_sharing_histogram;
204 int64 m_cache_to_cache;
205 int64 m_memory_to_cache;
206
207 Histogram m_prefetchWaitHistogram;
208
209 std::vector<Histogram> m_missLatencyHistograms;
210 std::vector<Histogram> m_machLatencyHistograms;
211 std::vector< std::vector<Histogram> > m_missMachLatencyHistograms;
212 Histogram m_wCCIssueToInitialRequestHistogram;
213 Histogram m_wCCInitialRequestToForwardRequestHistogram;
214 Histogram m_wCCForwardRequestToFirstResponseHistogram;
215 Histogram m_wCCFirstResponseToCompleteHistogram;
216 int64 m_wCCIncompleteTimes;
217 Histogram m_dirIssueToInitialRequestHistogram;
218 Histogram m_dirInitialRequestToForwardRequestHistogram;
219 Histogram m_dirForwardRequestToFirstResponseHistogram;
220 Histogram m_dirFirstResponseToCompleteHistogram;
221 int64 m_dirIncompleteTimes;
222
223 Histogram m_allMissLatencyHistogram;
224
225 Histogram m_allSWPrefetchLatencyHistogram;
226 Histogram m_SWPrefetchL2MissLatencyHistogram;
227 std::vector<Histogram> m_SWPrefetchLatencyHistograms;
228 std::vector<Histogram> m_SWPrefetchMachLatencyHistograms;
229
230 Histogram m_delayedCyclesHistogram;
231 Histogram m_delayedCyclesNonPFHistogram;
232 std::vector<Histogram> m_delayedCyclesVCHistograms;
233
234 Histogram m_outstanding_requests;
235 Histogram m_outstanding_persistent_requests;
236
237 Histogram m_average_latency_estimate;
238
239 m5::hash_set<Address> m_watch_address_set;
240 // counts all initiated cache request including PUTs
241 int m_requests;
242 std::map<std::string, int> m_requestProfileMap;
243
244 //added by SS
245 bool m_hot_lines;
246 bool m_all_instructions;
247
248 int m_num_of_sequencers;
249};
250
251inline std::ostream&
252operator<<(std::ostream& out, const Profiler& obj)
253{
254 obj.print(out);
255 out << std::flush;
256 return out;
257}
258
259#endif // __MEM_RUBY_PROFILER_PROFILER_HH__
260
261
67#include "params/RubyProfiler.hh"
68#include "sim/sim_object.hh"
69
70class RubyRequest;
71class AddressProfiler;
72
73class Profiler : public SimObject, public Consumer
74{
75 public:
76 typedef RubyProfilerParams Params;
77 Profiler(const Params *);
78 ~Profiler();
79
80 void wakeup();
81
82 void setPeriodicStatsFile(const std::string& filename);
83 void setPeriodicStatsInterval(integer_t period);
84
85 void printStats(std::ostream& out, bool short_stats=false);
86 void printShortStats(std::ostream& out) { printStats(out, true); }
87 void printTraceStats(std::ostream& out) const;
88 void clearStats();
89 void printConfig(std::ostream& out) const;
90 void printResourceUsage(std::ostream& out) const;
91
92 AddressProfiler* getAddressProfiler() { return m_address_profiler_ptr; }
93 AddressProfiler* getInstructionProfiler() { return m_inst_profiler_ptr; }
94
95 void addAddressTraceSample(const RubyRequest& msg, NodeID id);
96
97 void profileRequest(const std::string& requestStr);
98 void profileSharing(const Address& addr, AccessType type,
99 NodeID requestor, const Set& sharers,
100 const Set& owner);
101
102 void profileMulticastRetry(const Address& addr, int count);
103
104 void profileFilterAction(int action);
105
106 void profileConflictingRequests(const Address& addr);
107
108 void
109 profileOutstandingRequest(int outstanding)
110 {
111 m_outstanding_requests.add(outstanding);
112 }
113
114 void
115 profileOutstandingPersistentRequest(int outstanding)
116 {
117 m_outstanding_persistent_requests.add(outstanding);
118 }
119
120 void
121 profileAverageLatencyEstimate(int latency)
122 {
123 m_average_latency_estimate.add(latency);
124 }
125
126 void recordPrediction(bool wasGood, bool wasPredicted);
127
128 void startTransaction(int cpu);
129 void endTransaction(int cpu);
130 void profilePFWait(Time waitTime);
131
132 void controllerBusy(MachineID machID);
133 void bankBusy();
134
135 void missLatency(Time t,
136 RubyRequestType type,
137 const GenericMachineType respondingMach);
138
139 void missLatencyWcc(Time issuedTime,
140 Time initialRequestTime,
141 Time forwardRequestTime,
142 Time firstResponseTime,
143 Time completionTime);
144
145 void missLatencyDir(Time issuedTime,
146 Time initialRequestTime,
147 Time forwardRequestTime,
148 Time firstResponseTime,
149 Time completionTime);
150
151 void swPrefetchLatency(Time t,
152 RubyRequestType type,
153 const GenericMachineType respondingMach);
154
155 void sequencerRequests(int num) { m_sequencer_requests.add(num); }
156
157 void profileMsgDelay(int virtualNetwork, int delayCycles);
158
159 void print(std::ostream& out) const;
160
161 void rubyWatch(int proc);
162 bool watchAddress(Address addr);
163
164 // return Ruby's start time
165 Time
166 getRubyStartTime()
167 {
168 return m_ruby_start;
169 }
170
171 // added by SS
172 bool getHotLines() { return m_hot_lines; }
173 bool getAllInstructions() { return m_all_instructions; }
174
175 private:
176 // Private copy constructor and assignment operator
177 Profiler(const Profiler& obj);
178 Profiler& operator=(const Profiler& obj);
179
180 AddressProfiler* m_address_profiler_ptr;
181 AddressProfiler* m_inst_profiler_ptr;
182
183 std::vector<int64> m_instructions_executed_at_start;
184 std::vector<int64> m_cycles_executed_at_start;
185
186 std::ostream* m_periodic_output_file_ptr;
187 integer_t m_stats_period;
188
189 Time m_ruby_start;
190 time_t m_real_time_start_time;
191
192 std::vector<std::vector<integer_t> > m_busyControllerCount;
193 integer_t m_busyBankCount;
194 Histogram m_multicast_retry_histogram;
195
196 Histogram m_filter_action_histogram;
197 Histogram m_tbeProfile;
198
199 Histogram m_sequencer_requests;
200 Histogram m_read_sharing_histogram;
201 Histogram m_write_sharing_histogram;
202 Histogram m_all_sharing_histogram;
203 int64 m_cache_to_cache;
204 int64 m_memory_to_cache;
205
206 Histogram m_prefetchWaitHistogram;
207
208 std::vector<Histogram> m_missLatencyHistograms;
209 std::vector<Histogram> m_machLatencyHistograms;
210 std::vector< std::vector<Histogram> > m_missMachLatencyHistograms;
211 Histogram m_wCCIssueToInitialRequestHistogram;
212 Histogram m_wCCInitialRequestToForwardRequestHistogram;
213 Histogram m_wCCForwardRequestToFirstResponseHistogram;
214 Histogram m_wCCFirstResponseToCompleteHistogram;
215 int64 m_wCCIncompleteTimes;
216 Histogram m_dirIssueToInitialRequestHistogram;
217 Histogram m_dirInitialRequestToForwardRequestHistogram;
218 Histogram m_dirForwardRequestToFirstResponseHistogram;
219 Histogram m_dirFirstResponseToCompleteHistogram;
220 int64 m_dirIncompleteTimes;
221
222 Histogram m_allMissLatencyHistogram;
223
224 Histogram m_allSWPrefetchLatencyHistogram;
225 Histogram m_SWPrefetchL2MissLatencyHistogram;
226 std::vector<Histogram> m_SWPrefetchLatencyHistograms;
227 std::vector<Histogram> m_SWPrefetchMachLatencyHistograms;
228
229 Histogram m_delayedCyclesHistogram;
230 Histogram m_delayedCyclesNonPFHistogram;
231 std::vector<Histogram> m_delayedCyclesVCHistograms;
232
233 Histogram m_outstanding_requests;
234 Histogram m_outstanding_persistent_requests;
235
236 Histogram m_average_latency_estimate;
237
238 m5::hash_set<Address> m_watch_address_set;
239 // counts all initiated cache request including PUTs
240 int m_requests;
241 std::map<std::string, int> m_requestProfileMap;
242
243 //added by SS
244 bool m_hot_lines;
245 bool m_all_instructions;
246
247 int m_num_of_sequencers;
248};
249
250inline std::ostream&
251operator<<(std::ostream& out, const Profiler& obj)
252{
253 obj.print(out);
254 out << std::flush;
255 return out;
256}
257
258#endif // __MEM_RUBY_PROFILER_PROFILER_HH__
259
260