Profiler.cc (7546:84e8f914b3b8) Profiler.cc (7565:9fc3475e8175)
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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281 }
282 for (int i = 0; i < m_machLatencyHistograms.size(); i++) {
283 if (m_machLatencyHistograms[i].size() > 0) {
284 out << "miss_latency_" << GenericMachineType(i) << ": "
285 << m_machLatencyHistograms[i] << endl;
286 }
287 }
288
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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281 }
282 for (int i = 0; i < m_machLatencyHistograms.size(); i++) {
283 if (m_machLatencyHistograms[i].size() > 0) {
284 out << "miss_latency_" << GenericMachineType(i) << ": "
285 << m_machLatencyHistograms[i] << endl;
286 }
287 }
288
289 out << "miss_latency_wCC_issue_to_initial_request: "
290 << m_wCCIssueToInitialRequestHistogram << endl;
291 out << "miss_latency_wCC_initial_forward_request: "
292 << m_wCCInitialRequestToForwardRequestHistogram << endl;
293 out << "miss_latency_wCC_forward_to_first_response: "
294 << m_wCCForwardRequestToFirstResponseHistogram << endl;
295 out << "miss_latency_wCC_first_response_to_completion: "
296 << m_wCCFirstResponseToCompleteHistogram << endl;
297 out << "imcomplete_wCC_Times: " << m_wCCIncompleteTimes << endl;
298 out << "miss_latency_dir_issue_to_initial_request: "
299 << m_dirIssueToInitialRequestHistogram << endl;
300 out << "miss_latency_dir_initial_forward_request: "
301 << m_dirInitialRequestToForwardRequestHistogram << endl;
302 out << "miss_latency_dir_forward_to_first_response: "
303 << m_dirForwardRequestToFirstResponseHistogram << endl;
304 out << "miss_latency_dir_first_response_to_completion: "
305 << m_dirFirstResponseToCompleteHistogram << endl;
306 out << "imcomplete_dir_Times: " << m_dirIncompleteTimes << endl;
307
308 for (int i = 0; i < m_missMachLatencyHistograms.size(); i++) {
309 for (int j = 0; j < m_missMachLatencyHistograms[i].size(); j++) {
310 if (m_missMachLatencyHistograms[i][j].size() > 0) {
311 out << "miss_latency_" << RubyRequestType(i)
312 << "_" << GenericMachineType(j) << ": "
313 << m_missMachLatencyHistograms[i][j] << endl;
314 }
315 }
316 }
317
289 out << endl;
290
291 out << "All Non-Zero Cycle SW Prefetch Requests" << endl;
292 out << "------------------------------------" << endl;
293 out << "prefetch_latency: " << m_allSWPrefetchLatencyHistogram << endl;
294 for (int i = 0; i < m_SWPrefetchLatencyHistograms.size(); i++) {
295 if (m_SWPrefetchLatencyHistograms[i].size() > 0) {
296 out << "prefetch_latency_" << CacheRequestType(i) << ": "

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449 m_missLatencyHistograms.resize(RubyRequestType_NUM);
450 for (int i = 0; i < m_missLatencyHistograms.size(); i++) {
451 m_missLatencyHistograms[i].clear(200);
452 }
453 m_machLatencyHistograms.resize(GenericMachineType_NUM+1);
454 for (int i = 0; i < m_machLatencyHistograms.size(); i++) {
455 m_machLatencyHistograms[i].clear(200);
456 }
318 out << endl;
319
320 out << "All Non-Zero Cycle SW Prefetch Requests" << endl;
321 out << "------------------------------------" << endl;
322 out << "prefetch_latency: " << m_allSWPrefetchLatencyHistogram << endl;
323 for (int i = 0; i < m_SWPrefetchLatencyHistograms.size(); i++) {
324 if (m_SWPrefetchLatencyHistograms[i].size() > 0) {
325 out << "prefetch_latency_" << CacheRequestType(i) << ": "

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478 m_missLatencyHistograms.resize(RubyRequestType_NUM);
479 for (int i = 0; i < m_missLatencyHistograms.size(); i++) {
480 m_missLatencyHistograms[i].clear(200);
481 }
482 m_machLatencyHistograms.resize(GenericMachineType_NUM+1);
483 for (int i = 0; i < m_machLatencyHistograms.size(); i++) {
484 m_machLatencyHistograms[i].clear(200);
485 }
486 m_missMachLatencyHistograms.resize(RubyRequestType_NUM);
487 for (int i = 0; i < m_missLatencyHistograms.size(); i++) {
488 m_missMachLatencyHistograms[i].resize(GenericMachineType_NUM+1);
489 for (int j = 0; j < m_missMachLatencyHistograms[i].size(); j++) {
490 m_missMachLatencyHistograms[i][j].clear(200);
491 }
492 }
457 m_allMissLatencyHistogram.clear(200);
493 m_allMissLatencyHistogram.clear(200);
494 m_wCCIssueToInitialRequestHistogram.clear(200);
495 m_wCCInitialRequestToForwardRequestHistogram.clear(200);
496 m_wCCForwardRequestToFirstResponseHistogram.clear(200);
497 m_wCCFirstResponseToCompleteHistogram.clear(200);
498 m_wCCIncompleteTimes = 0;
499 m_dirIssueToInitialRequestHistogram.clear(200);
500 m_dirInitialRequestToForwardRequestHistogram.clear(200);
501 m_dirForwardRequestToFirstResponseHistogram.clear(200);
502 m_dirFirstResponseToCompleteHistogram.clear(200);
503 m_dirIncompleteTimes = 0;
458
459 m_SWPrefetchLatencyHistograms.resize(CacheRequestType_NUM);
460 for (int i = 0; i < m_SWPrefetchLatencyHistograms.size(); i++) {
461 m_SWPrefetchLatencyHistograms[i].clear(200);
462 }
463 m_SWPrefetchMachLatencyHistograms.resize(GenericMachineType_NUM+1);
464 for (int i = 0; i < m_SWPrefetchMachLatencyHistograms.size(); i++) {
465 m_SWPrefetchMachLatencyHistograms[i].clear(200);

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576void
577Profiler::missLatency(Time cycles,
578 RubyRequestType type,
579 const GenericMachineType respondingMach)
580{
581 m_allMissLatencyHistogram.add(cycles);
582 m_missLatencyHistograms[type].add(cycles);
583 m_machLatencyHistograms[respondingMach].add(cycles);
504
505 m_SWPrefetchLatencyHistograms.resize(CacheRequestType_NUM);
506 for (int i = 0; i < m_SWPrefetchLatencyHistograms.size(); i++) {
507 m_SWPrefetchLatencyHistograms[i].clear(200);
508 }
509 m_SWPrefetchMachLatencyHistograms.resize(GenericMachineType_NUM+1);
510 for (int i = 0; i < m_SWPrefetchMachLatencyHistograms.size(); i++) {
511 m_SWPrefetchMachLatencyHistograms[i].clear(200);

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622void
623Profiler::missLatency(Time cycles,
624 RubyRequestType type,
625 const GenericMachineType respondingMach)
626{
627 m_allMissLatencyHistogram.add(cycles);
628 m_missLatencyHistograms[type].add(cycles);
629 m_machLatencyHistograms[respondingMach].add(cycles);
630 m_missMachLatencyHistograms[type][respondingMach].add(cycles);
584}
585
631}
632
633void
634Profiler::missLatencyWcc(Time issuedTime,
635 Time initialRequestTime,
636 Time forwardRequestTime,
637 Time firstResponseTime,
638 Time completionTime)
639{
640 if ((issuedTime <= initialRequestTime) &&
641 (initialRequestTime <= forwardRequestTime) &&
642 (forwardRequestTime <= firstResponseTime) &&
643 (firstResponseTime <= completionTime)) {
644 m_wCCIssueToInitialRequestHistogram.add(initialRequestTime - issuedTime);
645
646 m_wCCInitialRequestToForwardRequestHistogram.add(forwardRequestTime -
647 initialRequestTime);
648
649 m_wCCForwardRequestToFirstResponseHistogram.add(firstResponseTime -
650 forwardRequestTime);
651
652 m_wCCFirstResponseToCompleteHistogram.add(completionTime -
653 firstResponseTime);
654 } else {
655 m_wCCIncompleteTimes++;
656 }
657}
658
659void
660Profiler::missLatencyDir(Time issuedTime,
661 Time initialRequestTime,
662 Time forwardRequestTime,
663 Time firstResponseTime,
664 Time completionTime)
665{
666 if ((issuedTime <= initialRequestTime) &&
667 (initialRequestTime <= forwardRequestTime) &&
668 (forwardRequestTime <= firstResponseTime) &&
669 (firstResponseTime <= completionTime)) {
670 m_dirIssueToInitialRequestHistogram.add(initialRequestTime - issuedTime);
671
672 m_dirInitialRequestToForwardRequestHistogram.add(forwardRequestTime -
673 initialRequestTime);
674
675 m_dirForwardRequestToFirstResponseHistogram.add(firstResponseTime -
676 forwardRequestTime);
677
678 m_dirFirstResponseToCompleteHistogram.add(completionTime -
679 firstResponseTime);
680 } else {
681 m_dirIncompleteTimes++;
682 }
683}
684
586// non-zero cycle prefetch request
587void
588Profiler::swPrefetchLatency(Time cycles,
589 CacheRequestType type,
590 const GenericMachineType respondingMach)
591{
592 m_allSWPrefetchLatencyHistogram.add(cycles);
593 m_SWPrefetchLatencyHistograms[type].add(cycles);

--- 99 unchanged lines hidden --- 		685// non-zero cycle prefetch request
686void
687Profiler::swPrefetchLatency(Time cycles,
688 CacheRequestType type,
689 const GenericMachineType respondingMach)
690{
691 m_allSWPrefetchLatencyHistogram.add(cycles);
692 m_SWPrefetchLatencyHistograms[type].add(cycles);

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