1/* 2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29/* 30 This file has been modified by Kevin Moore and Dan Nussbaum of the 31 Scalable Systems Research Group at Sun Microsystems Laboratories 32 (http://research.sun.com/scalable/) to support the Adaptive 33 Transactional Memory Test Platform (ATMTP). 34 35 Please send email to atmtp-interest@sun.com with feedback, questions, or 36 to request future announcements about ATMTP. 37 38 ---------------------------------------------------------------------- 39 40 File modification date: 2008-02-23 41 42 ---------------------------------------------------------------------- 43*/ 44 45// Allows use of times() library call, which determines virtual runtime 46#include <sys/resource.h> 47#include <sys/times.h> 48#include <sys/types.h> 49#include <unistd.h> 50 51#include <algorithm> 52#include <fstream> 53 54#include "base/stl_helpers.hh" 55#include "base/str.hh" 56#include "mem/protocol/MachineType.hh" 57#include "mem/protocol/RubyRequest.hh" 58#include "mem/ruby/network/Network.hh" 59#include "mem/ruby/profiler/AddressProfiler.hh" 60#include "mem/ruby/profiler/Profiler.hh" 61#include "mem/ruby/system/System.hh" 62 63using namespace std; 64using m5::stl_helpers::operator<<; 65 66static double process_memory_total(); 67static double process_memory_resident(); 68 69Profiler::Profiler(const Params *p) 70 : SimObject(p), m_event(this) 71{ 72 m_inst_profiler_ptr = NULL; 73 m_address_profiler_ptr = NULL; 74 75 m_real_time_start_time = time(NULL); // Not reset in clearStats() 76 m_stats_period = 1000000; // Default 77 m_periodic_output_file_ptr = &cerr; 78 79 m_hot_lines = p->hot_lines; 80 m_all_instructions = p->all_instructions; 81 82 m_num_of_sequencers = p->num_of_sequencers; 83 84 m_hot_lines = false; 85 m_all_instructions = false; 86 87 m_address_profiler_ptr = new AddressProfiler(m_num_of_sequencers); 88 m_address_profiler_ptr->setHotLines(m_hot_lines); 89 m_address_profiler_ptr->setAllInstructions(m_all_instructions); 90 91 if (m_all_instructions) { 92 m_inst_profiler_ptr = new AddressProfiler(m_num_of_sequencers); 93 m_inst_profiler_ptr->setHotLines(m_hot_lines); 94 m_inst_profiler_ptr->setAllInstructions(m_all_instructions); 95 } 96 97 p->ruby_system->registerProfiler(this); 98} 99 100Profiler::~Profiler() 101{ 102 if (m_periodic_output_file_ptr != &cerr) { 103 delete m_periodic_output_file_ptr; 104 } 105} 106 107void 108Profiler::wakeup() 109{ 110 // FIXME - avoid the repeated code 111 112 vector<int64_t> perProcCycleCount(m_num_of_sequencers); 113 114 for (int i = 0; i < m_num_of_sequencers; i++) { 115 perProcCycleCount[i] =
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116 g_system_ptr->getTime() - m_cycles_executed_at_start[i] + 1;
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116 g_system_ptr->curCycle() - m_cycles_executed_at_start[i] + 1; |
117 // The +1 allows us to avoid division by zero 118 } 119 120 ostream &out = *m_periodic_output_file_ptr; 121
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122 out << "ruby_cycles: " << g_system_ptr->getTime()-m_ruby_start << endl
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122 out << "ruby_cycles: " << g_system_ptr->curCycle()-m_ruby_start << endl |
123 << "mbytes_resident: " << process_memory_resident() << endl 124 << "mbytes_total: " << process_memory_total() << endl; 125 126 if (process_memory_total() > 0) { 127 out << "resident_ratio: " 128 << process_memory_resident() / process_memory_total() << endl; 129 } 130 131 out << "miss_latency: " << m_allMissLatencyHistogram << endl; 132 133 out << endl; 134 135 if (m_all_instructions) { 136 m_inst_profiler_ptr->printStats(out); 137 } 138 139 //g_system_ptr->getNetwork()->printStats(out); 140 schedule(m_event, g_system_ptr->clockEdge(Cycles(m_stats_period))); 141} 142 143void 144Profiler::setPeriodicStatsFile(const string& filename) 145{ 146 cout << "Recording periodic statistics to file '" << filename << "' every " 147 << m_stats_period << " Ruby cycles" << endl; 148 149 if (m_periodic_output_file_ptr != &cerr) { 150 delete m_periodic_output_file_ptr; 151 } 152 153 m_periodic_output_file_ptr = new ofstream(filename.c_str()); 154 schedule(m_event, g_system_ptr->clockEdge(Cycles(1))); 155} 156 157void 158Profiler::setPeriodicStatsInterval(int64_t period) 159{ 160 cout << "Recording periodic statistics every " << m_stats_period 161 << " Ruby cycles" << endl; 162 163 m_stats_period = period; 164 schedule(m_event, g_system_ptr->clockEdge(Cycles(1))); 165} 166 167void 168Profiler::print(ostream& out) const 169{ 170 out << "[Profiler]"; 171} 172 173void 174Profiler::printRequestProfile(ostream &out) 175{ 176 out << "Request vs. RubySystem State Profile" << endl; 177 out << "--------------------------------" << endl; 178 out << endl; 179 180 map<string, uint64_t> m_requestProfileMap; 181 uint64_t m_requests = 0; 182 183 for (uint32_t i = 0; i < MachineType_NUM; i++) { 184 for (map<uint32_t, AbstractController*>::iterator it = 185 g_abs_controls[i].begin(); 186 it != g_abs_controls[i].end(); ++it) { 187 188 AbstractController *ctr = (*it).second; 189 map<string, uint64_t> mp = ctr->getRequestProfileMap(); 190 191 for (map<string, uint64_t>::iterator jt = mp.begin(); 192 jt != mp.end(); ++jt) { 193 194 map<string, uint64_t>::iterator kt = 195 m_requestProfileMap.find((*jt).first); 196 if (kt != m_requestProfileMap.end()) { 197 (*kt).second += (*jt).second; 198 } else { 199 m_requestProfileMap[(*jt).first] = (*jt).second; 200 } 201 } 202 203 m_requests += ctr->getRequestCount(); 204 } 205 } 206 207 map<string, uint64_t>::const_iterator i = m_requestProfileMap.begin(); 208 map<string, uint64_t>::const_iterator end = m_requestProfileMap.end(); 209 for (; i != end; ++i) { 210 const string &key = i->first; 211 uint64_t count = i->second; 212 213 double percent = (100.0 * double(count)) / double(m_requests); 214 vector<string> items; 215 tokenize(items, key, ':'); 216 vector<string>::iterator j = items.begin(); 217 vector<string>::iterator end = items.end(); 218 for (; j != end; ++i) 219 out << setw(10) << *j; 220 out << setw(11) << count; 221 out << setw(14) << percent << endl; 222 } 223 out << endl; 224} 225 226void 227Profiler::printDelayProfile(ostream &out) 228{ 229 out << "Message Delayed Cycles" << endl; 230 out << "----------------------" << endl; 231 232 uint32_t numVNets = Network::getNumberOfVirtualNetworks(); 233 Histogram delayHistogram; 234 std::vector<Histogram> delayVCHistogram(numVNets); 235 236 for (uint32_t i = 0; i < MachineType_NUM; i++) { 237 for (map<uint32_t, AbstractController*>::iterator it = 238 g_abs_controls[i].begin(); 239 it != g_abs_controls[i].end(); ++it) { 240 241 AbstractController *ctr = (*it).second; 242 delayHistogram.add(ctr->getDelayHist()); 243 244 for (uint32_t i = 0; i < numVNets; i++) { 245 delayVCHistogram[i].add(ctr->getDelayVCHist(i)); 246 } 247 } 248 } 249 250 out << "Total_delay_cycles: " << delayHistogram << endl; 251 252 for (int i = 0; i < numVNets; i++) { 253 out << " virtual_network_" << i << "_delay_cycles: " 254 << delayVCHistogram[i] << endl; 255 } 256} 257 258void 259Profiler::printStats(ostream& out, bool short_stats) 260{ 261 out << endl; 262 if (short_stats) { 263 out << "SHORT "; 264 } 265 out << "Profiler Stats" << endl; 266 out << "--------------" << endl; 267 268 time_t real_time_current = time(NULL); 269 double seconds = difftime(real_time_current, m_real_time_start_time); 270 double minutes = seconds / 60.0; 271 double hours = minutes / 60.0; 272 double days = hours / 24.0;
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273 Cycles ruby_cycles = g_system_ptr->getTime()-m_ruby_start;
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273 Cycles ruby_cycles = g_system_ptr->curCycle()-m_ruby_start; |
274 275 if (!short_stats) { 276 out << "Elapsed_time_in_seconds: " << seconds << endl; 277 out << "Elapsed_time_in_minutes: " << minutes << endl; 278 out << "Elapsed_time_in_hours: " << hours << endl; 279 out << "Elapsed_time_in_days: " << days << endl; 280 out << endl; 281 } 282 283 // print the virtual runtimes as well 284 struct tms vtime; 285 times(&vtime); 286 seconds = (vtime.tms_utime + vtime.tms_stime) / 100.0; 287 minutes = seconds / 60.0; 288 hours = minutes / 60.0; 289 days = hours / 24.0; 290 out << "Virtual_time_in_seconds: " << seconds << endl; 291 out << "Virtual_time_in_minutes: " << minutes << endl; 292 out << "Virtual_time_in_hours: " << hours << endl; 293 out << "Virtual_time_in_days: " << days << endl; 294 out << endl; 295
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296 out << "Ruby_current_time: " << g_system_ptr->getTime() << endl;
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296 out << "Ruby_current_time: " << g_system_ptr->curCycle() << endl; |
297 out << "Ruby_start_time: " << m_ruby_start << endl; 298 out << "Ruby_cycles: " << ruby_cycles << endl; 299 out << endl; 300 301 if (!short_stats) { 302 out << "mbytes_resident: " << process_memory_resident() << endl; 303 out << "mbytes_total: " << process_memory_total() << endl; 304 if (process_memory_total() > 0) { 305 out << "resident_ratio: " 306 << process_memory_resident()/process_memory_total() << endl; 307 } 308 out << endl; 309 } 310 311 vector<int64_t> perProcCycleCount(m_num_of_sequencers); 312 313 for (int i = 0; i < m_num_of_sequencers; i++) { 314 perProcCycleCount[i] =
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315 g_system_ptr->getTime() - m_cycles_executed_at_start[i] + 1;
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315 g_system_ptr->curCycle() - m_cycles_executed_at_start[i] + 1; |
316 // The +1 allows us to avoid division by zero 317 } 318 319 out << "ruby_cycles_executed: " << perProcCycleCount << endl; 320 321 out << endl; 322 323 if (!short_stats) { 324 out << "Busy Controller Counts:" << endl; 325 for (uint32_t i = 0; i < MachineType_NUM; i++) { 326 uint32_t size = MachineType_base_count((MachineType)i); 327 328 for (uint32_t j = 0; j < size; j++) { 329 MachineID machID; 330 machID.type = (MachineType)i; 331 machID.num = j; 332 333 AbstractController *ctr = 334 (*(g_abs_controls[i].find(j))).second; 335 out << machID << ":" << ctr->getFullyBusyCycles() << " "; 336 if ((j + 1) % 8 == 0) { 337 out << endl; 338 } 339 } 340 out << endl; 341 } 342 out << endl; 343 344 out << "Busy Bank Count:" << m_busyBankCount << endl; 345 out << endl; 346 347 out << "sequencer_requests_outstanding: " 348 << m_sequencer_requests << endl; 349 out << endl; 350 } 351 352 if (!short_stats) { 353 out << "All Non-Zero Cycle Demand Cache Accesses" << endl; 354 out << "----------------------------------------" << endl; 355 out << "miss_latency: " << m_allMissLatencyHistogram << endl; 356 for (int i = 0; i < m_missLatencyHistograms.size(); i++) { 357 if (m_missLatencyHistograms[i].size() > 0) { 358 out << "miss_latency_" << RubyRequestType(i) << ": " 359 << m_missLatencyHistograms[i] << endl; 360 } 361 } 362 for (int i = 0; i < m_machLatencyHistograms.size(); i++) { 363 if (m_machLatencyHistograms[i].size() > 0) { 364 out << "miss_latency_" << GenericMachineType(i) << ": " 365 << m_machLatencyHistograms[i] << endl; 366 } 367 } 368 369 out << "miss_latency_wCC_issue_to_initial_request: " 370 << m_wCCIssueToInitialRequestHistogram << endl; 371 out << "miss_latency_wCC_initial_forward_request: " 372 << m_wCCInitialRequestToForwardRequestHistogram << endl; 373 out << "miss_latency_wCC_forward_to_first_response: " 374 << m_wCCForwardRequestToFirstResponseHistogram << endl; 375 out << "miss_latency_wCC_first_response_to_completion: " 376 << m_wCCFirstResponseToCompleteHistogram << endl; 377 out << "imcomplete_wCC_Times: " << m_wCCIncompleteTimes << endl; 378 out << "miss_latency_dir_issue_to_initial_request: " 379 << m_dirIssueToInitialRequestHistogram << endl; 380 out << "miss_latency_dir_initial_forward_request: " 381 << m_dirInitialRequestToForwardRequestHistogram << endl; 382 out << "miss_latency_dir_forward_to_first_response: " 383 << m_dirForwardRequestToFirstResponseHistogram << endl; 384 out << "miss_latency_dir_first_response_to_completion: " 385 << m_dirFirstResponseToCompleteHistogram << endl; 386 out << "imcomplete_dir_Times: " << m_dirIncompleteTimes << endl; 387 388 for (int i = 0; i < m_missMachLatencyHistograms.size(); i++) { 389 for (int j = 0; j < m_missMachLatencyHistograms[i].size(); j++) { 390 if (m_missMachLatencyHistograms[i][j].size() > 0) { 391 out << "miss_latency_" << RubyRequestType(i) 392 << "_" << GenericMachineType(j) << ": " 393 << m_missMachLatencyHistograms[i][j] << endl; 394 } 395 } 396 } 397 398 out << endl; 399 400 out << "All Non-Zero Cycle SW Prefetch Requests" << endl; 401 out << "------------------------------------" << endl; 402 out << "prefetch_latency: " << m_allSWPrefetchLatencyHistogram << endl; 403 for (int i = 0; i < m_SWPrefetchLatencyHistograms.size(); i++) { 404 if (m_SWPrefetchLatencyHistograms[i].size() > 0) { 405 out << "prefetch_latency_" << RubyRequestType(i) << ": " 406 << m_SWPrefetchLatencyHistograms[i] << endl; 407 } 408 } 409 for (int i = 0; i < m_SWPrefetchMachLatencyHistograms.size(); i++) { 410 if (m_SWPrefetchMachLatencyHistograms[i].size() > 0) { 411 out << "prefetch_latency_" << GenericMachineType(i) << ": " 412 << m_SWPrefetchMachLatencyHistograms[i] << endl; 413 } 414 } 415 out << "prefetch_latency_L2Miss:" 416 << m_SWPrefetchL2MissLatencyHistogram << endl; 417 418 if (m_all_sharing_histogram.size() > 0) { 419 out << "all_sharing: " << m_all_sharing_histogram << endl; 420 out << "read_sharing: " << m_read_sharing_histogram << endl; 421 out << "write_sharing: " << m_write_sharing_histogram << endl; 422 423 out << "all_sharing_percent: "; 424 m_all_sharing_histogram.printPercent(out); 425 out << endl; 426 427 out << "read_sharing_percent: "; 428 m_read_sharing_histogram.printPercent(out); 429 out << endl; 430 431 out << "write_sharing_percent: "; 432 m_write_sharing_histogram.printPercent(out); 433 out << endl; 434 435 int64 total_miss = m_cache_to_cache + m_memory_to_cache; 436 out << "all_misses: " << total_miss << endl; 437 out << "cache_to_cache_misses: " << m_cache_to_cache << endl; 438 out << "memory_to_cache_misses: " << m_memory_to_cache << endl; 439 out << "cache_to_cache_percent: " 440 << 100.0 * (double(m_cache_to_cache) / double(total_miss)) 441 << endl; 442 out << "memory_to_cache_percent: " 443 << 100.0 * (double(m_memory_to_cache) / double(total_miss)) 444 << endl; 445 out << endl; 446 } 447 448 if (m_outstanding_requests.size() > 0) { 449 out << "outstanding_requests: "; 450 m_outstanding_requests.printPercent(out); 451 out << endl; 452 out << endl; 453 } 454 } 455 456 if (!short_stats) { 457 printRequestProfile(out); 458 459 out << "filter_action: " << m_filter_action_histogram << endl; 460 461 if (!m_all_instructions) { 462 m_address_profiler_ptr->printStats(out); 463 } 464 465 if (m_all_instructions) { 466 m_inst_profiler_ptr->printStats(out); 467 } 468 469 out << endl; 470 printDelayProfile(out); 471 printResourceUsage(out); 472 } 473} 474 475void 476Profiler::printResourceUsage(ostream& out) const 477{ 478 out << endl; 479 out << "Resource Usage" << endl; 480 out << "--------------" << endl; 481 482 int64_t pagesize = getpagesize(); // page size in bytes 483 out << "page_size: " << pagesize << endl; 484 485 rusage usage; 486 getrusage (RUSAGE_SELF, &usage); 487 488 out << "user_time: " << usage.ru_utime.tv_sec << endl; 489 out << "system_time: " << usage.ru_stime.tv_sec << endl; 490 out << "page_reclaims: " << usage.ru_minflt << endl; 491 out << "page_faults: " << usage.ru_majflt << endl; 492 out << "swaps: " << usage.ru_nswap << endl; 493 out << "block_inputs: " << usage.ru_inblock << endl; 494 out << "block_outputs: " << usage.ru_oublock << endl; 495} 496 497void 498Profiler::clearStats() 499{
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500 m_ruby_start = g_system_ptr->getTime();
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500 m_ruby_start = g_system_ptr->curCycle(); |
501 m_real_time_start_time = time(NULL); 502 503 m_cycles_executed_at_start.resize(m_num_of_sequencers); 504 for (int i = 0; i < m_num_of_sequencers; i++) { 505 if (g_system_ptr == NULL) { 506 m_cycles_executed_at_start[i] = 0; 507 } else {
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508 m_cycles_executed_at_start[i] = g_system_ptr->getTime();
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508 m_cycles_executed_at_start[i] = g_system_ptr->curCycle(); |
509 } 510 } 511 512 m_busyBankCount = 0; 513 514 m_missLatencyHistograms.resize(RubyRequestType_NUM); 515 for (int i = 0; i < m_missLatencyHistograms.size(); i++) { 516 m_missLatencyHistograms[i].clear(200); 517 } 518 m_machLatencyHistograms.resize(GenericMachineType_NUM+1); 519 for (int i = 0; i < m_machLatencyHistograms.size(); i++) { 520 m_machLatencyHistograms[i].clear(200); 521 } 522 m_missMachLatencyHistograms.resize(RubyRequestType_NUM); 523 for (int i = 0; i < m_missLatencyHistograms.size(); i++) { 524 m_missMachLatencyHistograms[i].resize(GenericMachineType_NUM+1); 525 for (int j = 0; j < m_missMachLatencyHistograms[i].size(); j++) { 526 m_missMachLatencyHistograms[i][j].clear(200); 527 } 528 } 529 m_allMissLatencyHistogram.clear(200); 530 m_wCCIssueToInitialRequestHistogram.clear(200); 531 m_wCCInitialRequestToForwardRequestHistogram.clear(200); 532 m_wCCForwardRequestToFirstResponseHistogram.clear(200); 533 m_wCCFirstResponseToCompleteHistogram.clear(200); 534 m_wCCIncompleteTimes = 0; 535 m_dirIssueToInitialRequestHistogram.clear(200); 536 m_dirInitialRequestToForwardRequestHistogram.clear(200); 537 m_dirForwardRequestToFirstResponseHistogram.clear(200); 538 m_dirFirstResponseToCompleteHistogram.clear(200); 539 m_dirIncompleteTimes = 0; 540 541 m_SWPrefetchLatencyHistograms.resize(RubyRequestType_NUM); 542 for (int i = 0; i < m_SWPrefetchLatencyHistograms.size(); i++) { 543 m_SWPrefetchLatencyHistograms[i].clear(200); 544 } 545 m_SWPrefetchMachLatencyHistograms.resize(GenericMachineType_NUM+1); 546 for (int i = 0; i < m_SWPrefetchMachLatencyHistograms.size(); i++) { 547 m_SWPrefetchMachLatencyHistograms[i].clear(200); 548 } 549 m_allSWPrefetchLatencyHistogram.clear(200); 550 551 m_sequencer_requests.clear(); 552 m_read_sharing_histogram.clear(); 553 m_write_sharing_histogram.clear(); 554 m_all_sharing_histogram.clear(); 555 m_cache_to_cache = 0; 556 m_memory_to_cache = 0; 557 558 m_outstanding_requests.clear(); 559 m_outstanding_persistent_requests.clear(); 560 561 // Flush the prefetches through the system - used so that there 562 // are no outstanding requests after stats are cleared 563 //g_eventQueue_ptr->triggerAllEvents(); 564 565 // update the start time
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566 m_ruby_start = g_system_ptr->getTime();
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566 m_ruby_start = g_system_ptr->curCycle(); |
567} 568 569void 570Profiler::addAddressTraceSample(const RubyRequest& msg, NodeID id) 571{ 572 if (msg.getType() != RubyRequestType_IFETCH) { 573 // Note: The following line should be commented out if you 574 // want to use the special profiling that is part of the GS320 575 // protocol 576 577 // NOTE: Unless PROFILE_HOT_LINES is enabled, nothing will be 578 // profiled by the AddressProfiler 579 m_address_profiler_ptr-> 580 addTraceSample(msg.getLineAddress(), msg.getProgramCounter(), 581 msg.getType(), msg.getAccessMode(), id, false); 582 } 583} 584 585void 586Profiler::profileSharing(const Address& addr, AccessType type, 587 NodeID requestor, const Set& sharers, 588 const Set& owner) 589{ 590 Set set_contacted(owner); 591 if (type == AccessType_Write) { 592 set_contacted.addSet(sharers); 593 } 594 set_contacted.remove(requestor); 595 int number_contacted = set_contacted.count(); 596 597 if (type == AccessType_Write) { 598 m_write_sharing_histogram.add(number_contacted); 599 } else { 600 m_read_sharing_histogram.add(number_contacted); 601 } 602 m_all_sharing_histogram.add(number_contacted); 603 604 if (number_contacted == 0) { 605 m_memory_to_cache++; 606 } else { 607 m_cache_to_cache++; 608 } 609} 610 611void 612Profiler::profilePFWait(Cycles waitTime) 613{ 614 m_prefetchWaitHistogram.add(waitTime); 615} 616 617void 618Profiler::bankBusy() 619{ 620 m_busyBankCount++; 621} 622 623// non-zero cycle demand request 624void 625Profiler::missLatency(Cycles cycles, 626 RubyRequestType type, 627 const GenericMachineType respondingMach) 628{ 629 m_allMissLatencyHistogram.add(cycles); 630 m_missLatencyHistograms[type].add(cycles); 631 m_machLatencyHistograms[respondingMach].add(cycles); 632 m_missMachLatencyHistograms[type][respondingMach].add(cycles); 633} 634 635void 636Profiler::missLatencyWcc(Cycles issuedTime, 637 Cycles initialRequestTime, 638 Cycles forwardRequestTime, 639 Cycles firstResponseTime, 640 Cycles completionTime) 641{ 642 if ((issuedTime <= initialRequestTime) && 643 (initialRequestTime <= forwardRequestTime) && 644 (forwardRequestTime <= firstResponseTime) && 645 (firstResponseTime <= completionTime)) { 646 m_wCCIssueToInitialRequestHistogram.add(initialRequestTime - issuedTime); 647 648 m_wCCInitialRequestToForwardRequestHistogram.add(forwardRequestTime - 649 initialRequestTime); 650 651 m_wCCForwardRequestToFirstResponseHistogram.add(firstResponseTime - 652 forwardRequestTime); 653 654 m_wCCFirstResponseToCompleteHistogram.add(completionTime - 655 firstResponseTime); 656 } else { 657 m_wCCIncompleteTimes++; 658 } 659} 660 661void 662Profiler::missLatencyDir(Cycles issuedTime, 663 Cycles initialRequestTime, 664 Cycles forwardRequestTime, 665 Cycles firstResponseTime, 666 Cycles completionTime) 667{ 668 if ((issuedTime <= initialRequestTime) && 669 (initialRequestTime <= forwardRequestTime) && 670 (forwardRequestTime <= firstResponseTime) && 671 (firstResponseTime <= completionTime)) { 672 m_dirIssueToInitialRequestHistogram.add(initialRequestTime - issuedTime); 673 674 m_dirInitialRequestToForwardRequestHistogram.add(forwardRequestTime - 675 initialRequestTime); 676 677 m_dirForwardRequestToFirstResponseHistogram.add(firstResponseTime - 678 forwardRequestTime); 679 680 m_dirFirstResponseToCompleteHistogram.add(completionTime - 681 firstResponseTime); 682 } else { 683 m_dirIncompleteTimes++; 684 } 685} 686 687// non-zero cycle prefetch request 688void 689Profiler::swPrefetchLatency(Cycles cycles, RubyRequestType type, 690 const GenericMachineType respondingMach) 691{ 692 m_allSWPrefetchLatencyHistogram.add(cycles); 693 m_SWPrefetchLatencyHistograms[type].add(cycles); 694 m_SWPrefetchMachLatencyHistograms[respondingMach].add(cycles); 695 696 if (respondingMach == GenericMachineType_Directory || 697 respondingMach == GenericMachineType_NUM) { 698 m_SWPrefetchL2MissLatencyHistogram.add(cycles); 699 } 700} 701 702// Helper function 703static double 704process_memory_total() 705{ 706 // 4kB page size, 1024*1024 bytes per MB, 707 const double MULTIPLIER = 4096.0 / (1024.0 * 1024.0); 708 ifstream proc_file; 709 proc_file.open("/proc/self/statm"); 710 int total_size_in_pages = 0; 711 int res_size_in_pages = 0; 712 proc_file >> total_size_in_pages; 713 proc_file >> res_size_in_pages; 714 return double(total_size_in_pages) * MULTIPLIER; // size in megabytes 715} 716 717static double 718process_memory_resident() 719{ 720 // 4kB page size, 1024*1024 bytes per MB, 721 const double MULTIPLIER = 4096.0 / (1024.0 * 1024.0); 722 ifstream proc_file; 723 proc_file.open("/proc/self/statm"); 724 int total_size_in_pages = 0; 725 int res_size_in_pages = 0; 726 proc_file >> total_size_in_pages; 727 proc_file >> res_size_in_pages; 728 return double(res_size_in_pages) * MULTIPLIER; // size in megabytes 729} 730 731void 732Profiler::rubyWatch(int id) 733{ 734 uint64 tr = 0; 735 Address watch_address = Address(tr); 736
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737 DPRINTFN("%7s %3s RUBY WATCH %d\n", g_system_ptr->getTime(), id,
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737 DPRINTFN("%7s %3s RUBY WATCH %d\n", g_system_ptr->curCycle(), id, |
738 watch_address); 739 740 // don't care about success or failure 741 m_watch_address_set.insert(watch_address); 742} 743 744bool 745Profiler::watchAddress(Address addr) 746{ 747 return m_watch_address_set.count(addr) > 0; 748} 749 750Profiler * 751RubyProfilerParams::create() 752{ 753 return new Profiler(this); 754}
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