1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/*
30 This file has been modified by Kevin Moore and Dan Nussbaum of the
31 Scalable Systems Research Group at Sun Microsystems Laboratories
32 (http://research.sun.com/scalable/) to support the Adaptive
33 Transactional Memory Test Platform (ATMTP).
34
35 Please send email to atmtp-interest@sun.com with feedback, questions, or
36 to request future announcements about ATMTP.
37
38 ----------------------------------------------------------------------
39
40 File modification date: 2008-02-23
41
42 ----------------------------------------------------------------------
43*/
44
45/*
46 * Profiler.cc
47 *
48 * Description: See Profiler.hh
49 *
50 * $Id$
51 *
52 */
53
54#include "mem/ruby/profiler/Profiler.hh"
| 1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/*
30 This file has been modified by Kevin Moore and Dan Nussbaum of the
31 Scalable Systems Research Group at Sun Microsystems Laboratories
32 (http://research.sun.com/scalable/) to support the Adaptive
33 Transactional Memory Test Platform (ATMTP).
34
35 Please send email to atmtp-interest@sun.com with feedback, questions, or
36 to request future announcements about ATMTP.
37
38 ----------------------------------------------------------------------
39
40 File modification date: 2008-02-23
41
42 ----------------------------------------------------------------------
43*/
44
45/*
46 * Profiler.cc
47 *
48 * Description: See Profiler.hh
49 *
50 * $Id$
51 *
52 */
53
54#include "mem/ruby/profiler/Profiler.hh"
|
55#include "mem/ruby/profiler/CacheProfiler.hh"
| |
56#include "mem/ruby/profiler/AddressProfiler.hh"
57#include "mem/ruby/system/System.hh"
58#include "mem/ruby/network/Network.hh"
59#include "mem/gems_common/PrioHeap.hh"
60#include "mem/protocol/CacheMsg.hh"
61#include "mem/protocol/Protocol.hh"
62#include "mem/gems_common/util.hh"
63#include "mem/gems_common/Map.hh"
64#include "mem/ruby/common/Debug.hh"
65#include "mem/protocol/MachineType.hh"
66
67// Allows use of times() library call, which determines virtual runtime
68#include <sys/times.h>
69
70extern std::ostream * debug_cout_ptr;
71
72static double process_memory_total();
73static double process_memory_resident();
74
75Profiler::Profiler(const string & name)
| 55#include "mem/ruby/profiler/AddressProfiler.hh"
56#include "mem/ruby/system/System.hh"
57#include "mem/ruby/network/Network.hh"
58#include "mem/gems_common/PrioHeap.hh"
59#include "mem/protocol/CacheMsg.hh"
60#include "mem/protocol/Protocol.hh"
61#include "mem/gems_common/util.hh"
62#include "mem/gems_common/Map.hh"
63#include "mem/ruby/common/Debug.hh"
64#include "mem/protocol/MachineType.hh"
65
66// Allows use of times() library call, which determines virtual runtime
67#include <sys/times.h>
68
69extern std::ostream * debug_cout_ptr;
70
71static double process_memory_total();
72static double process_memory_resident();
73
74Profiler::Profiler(const string & name)
|
76 : m_conflicting_histogram(-1)
| |
77{
78 m_name = name;
79 m_requestProfileMap_ptr = new Map<string, int>;
| 75{
76 m_name = name;
77 m_requestProfileMap_ptr = new Map<string, int>;
|
80 m_L1D_cache_profiler_ptr = new CacheProfiler("L1D_cache");
81 m_L1I_cache_profiler_ptr = new CacheProfiler("L1I_cache");
| |
82
| 78
|
83 m_L2_cache_profiler_ptr = new CacheProfiler("L2_cache");
84
| |
85 m_inst_profiler_ptr = NULL;
86 m_address_profiler_ptr = NULL;
87
| 79 m_inst_profiler_ptr = NULL;
80 m_address_profiler_ptr = NULL;
81
|
88/*
89 m_address_profiler_ptr = new AddressProfiler;
90 m_inst_profiler_ptr = NULL;
91 if (m_all_instructions) {
92 m_inst_profiler_ptr = new AddressProfiler;
93 }
94*/
95 m_conflicting_map_ptr = new Map<Address, Time>;
96
| |
97 m_real_time_start_time = time(NULL); // Not reset in clearStats()
98 m_stats_period = 1000000; // Default
99 m_periodic_output_file_ptr = &cerr;
100
101}
102
103Profiler::~Profiler()
104{
105 if (m_periodic_output_file_ptr != &cerr) {
106 delete m_periodic_output_file_ptr;
107 }
| 82 m_real_time_start_time = time(NULL); // Not reset in clearStats()
83 m_stats_period = 1000000; // Default
84 m_periodic_output_file_ptr = &cerr;
85
86}
87
88Profiler::~Profiler()
89{
90 if (m_periodic_output_file_ptr != &cerr) {
91 delete m_periodic_output_file_ptr;
92 }
|
108 delete m_address_profiler_ptr;
109 delete m_L1D_cache_profiler_ptr;
110 delete m_L1I_cache_profiler_ptr;
111 delete m_L2_cache_profiler_ptr;
| |
112 delete m_requestProfileMap_ptr;
| 93 delete m_requestProfileMap_ptr;
|
113 delete m_conflicting_map_ptr;
| |
114}
115
116void Profiler::init(const vector<string> & argv, vector<string> memory_control_names)
117{
118 // added by SS
119 vector<string>::iterator it;
120 memory_control_profiler* mcp;
121 m_memory_control_names = memory_control_names;
122// printf ( "Here in Profiler::init \n");
123 for ( it=memory_control_names.begin() ; it < memory_control_names.end(); it++ ){
124// printf ( "Here in Profiler::init memory control name %s \n", (*it).c_str());
125 mcp = new memory_control_profiler;
126 mcp->m_memReq = 0;
127 mcp->m_memBankBusy = 0;
128 mcp->m_memBusBusy = 0;
129 mcp->m_memReadWriteBusy = 0;
130 mcp->m_memDataBusBusy = 0;
131 mcp->m_memTfawBusy = 0;
132 mcp->m_memRefresh = 0;
133 mcp->m_memRead = 0;
134 mcp->m_memWrite = 0;
135 mcp->m_memWaitCycles = 0;
136 mcp->m_memInputQ = 0;
137 mcp->m_memBankQ = 0;
138 mcp->m_memArbWait = 0;
139 mcp->m_memRandBusy = 0;
140 mcp->m_memNotOld = 0;
141
142 mcp->m_banks_per_rank = RubySystem::getMemoryControl((*it).c_str())->getBanksPerRank();
143 mcp->m_ranks_per_dimm = RubySystem::getMemoryControl((*it).c_str())->getRanksPerDimm();
144 mcp->m_dimms_per_channel = RubySystem::getMemoryControl((*it).c_str())->getDimmsPerChannel();
145
146 int totalBanks = mcp->m_banks_per_rank
147 * mcp->m_ranks_per_dimm
148 * mcp->m_dimms_per_channel;
149
150 mcp->m_memBankCount.setSize(totalBanks);
151
152 m_memory_control_profilers [(*it).c_str()] = mcp;
153 }
154
155 clearStats();
156 m_hot_lines = false;
157 m_all_instructions = false;
158
159 for (size_t i=0; i<argv.size(); i+=2) {
160 if ( argv[i] == "hot_lines") {
161 m_hot_lines = (argv[i+1]=="true");
162 } else if ( argv[i] == "all_instructions") {
163 m_all_instructions = (argv[i+1]=="true");
164 }else {
165 cerr << "WARNING: Profiler: Unkown configuration parameter: " << argv[i] << endl;
166 assert(false);
167 }
168 }
169
170 m_address_profiler_ptr = new AddressProfiler;
171 m_address_profiler_ptr -> setHotLines(m_hot_lines);
172 m_address_profiler_ptr -> setAllInstructions(m_all_instructions);
173
174 if (m_all_instructions) {
175 m_inst_profiler_ptr = new AddressProfiler;
176 m_inst_profiler_ptr -> setHotLines(m_hot_lines);
177 m_inst_profiler_ptr -> setAllInstructions(m_all_instructions);
178 }
179}
180
181void Profiler::wakeup()
182{
183 // FIXME - avoid the repeated code
184
| 94}
95
96void Profiler::init(const vector<string> & argv, vector<string> memory_control_names)
97{
98 // added by SS
99 vector<string>::iterator it;
100 memory_control_profiler* mcp;
101 m_memory_control_names = memory_control_names;
102// printf ( "Here in Profiler::init \n");
103 for ( it=memory_control_names.begin() ; it < memory_control_names.end(); it++ ){
104// printf ( "Here in Profiler::init memory control name %s \n", (*it).c_str());
105 mcp = new memory_control_profiler;
106 mcp->m_memReq = 0;
107 mcp->m_memBankBusy = 0;
108 mcp->m_memBusBusy = 0;
109 mcp->m_memReadWriteBusy = 0;
110 mcp->m_memDataBusBusy = 0;
111 mcp->m_memTfawBusy = 0;
112 mcp->m_memRefresh = 0;
113 mcp->m_memRead = 0;
114 mcp->m_memWrite = 0;
115 mcp->m_memWaitCycles = 0;
116 mcp->m_memInputQ = 0;
117 mcp->m_memBankQ = 0;
118 mcp->m_memArbWait = 0;
119 mcp->m_memRandBusy = 0;
120 mcp->m_memNotOld = 0;
121
122 mcp->m_banks_per_rank = RubySystem::getMemoryControl((*it).c_str())->getBanksPerRank();
123 mcp->m_ranks_per_dimm = RubySystem::getMemoryControl((*it).c_str())->getRanksPerDimm();
124 mcp->m_dimms_per_channel = RubySystem::getMemoryControl((*it).c_str())->getDimmsPerChannel();
125
126 int totalBanks = mcp->m_banks_per_rank
127 * mcp->m_ranks_per_dimm
128 * mcp->m_dimms_per_channel;
129
130 mcp->m_memBankCount.setSize(totalBanks);
131
132 m_memory_control_profilers [(*it).c_str()] = mcp;
133 }
134
135 clearStats();
136 m_hot_lines = false;
137 m_all_instructions = false;
138
139 for (size_t i=0; i<argv.size(); i+=2) {
140 if ( argv[i] == "hot_lines") {
141 m_hot_lines = (argv[i+1]=="true");
142 } else if ( argv[i] == "all_instructions") {
143 m_all_instructions = (argv[i+1]=="true");
144 }else {
145 cerr << "WARNING: Profiler: Unkown configuration parameter: " << argv[i] << endl;
146 assert(false);
147 }
148 }
149
150 m_address_profiler_ptr = new AddressProfiler;
151 m_address_profiler_ptr -> setHotLines(m_hot_lines);
152 m_address_profiler_ptr -> setAllInstructions(m_all_instructions);
153
154 if (m_all_instructions) {
155 m_inst_profiler_ptr = new AddressProfiler;
156 m_inst_profiler_ptr -> setHotLines(m_hot_lines);
157 m_inst_profiler_ptr -> setAllInstructions(m_all_instructions);
158 }
159}
160
161void Profiler::wakeup()
162{
163 // FIXME - avoid the repeated code
164
|
185 Vector<integer_t> perProcInstructionCount;
186 perProcInstructionCount.setSize(RubySystem::getNumberOfSequencers());
187
| |
188 Vector<integer_t> perProcCycleCount;
189 perProcCycleCount.setSize(RubySystem::getNumberOfSequencers());
190
191 for(int i=0; i < RubySystem::getNumberOfSequencers(); i++) {
| 165 Vector<integer_t> perProcCycleCount;
166 perProcCycleCount.setSize(RubySystem::getNumberOfSequencers());
167
168 for(int i=0; i < RubySystem::getNumberOfSequencers(); i++) {
|
192 perProcInstructionCount[i] = g_system_ptr->getInstructionCount(i) - m_instructions_executed_at_start[i] + 1;
| |
193 perProcCycleCount[i] = g_system_ptr->getCycleCount(i) - m_cycles_executed_at_start[i] + 1;
194 // The +1 allows us to avoid division by zero
195 }
196
197 integer_t total_misses = m_perProcTotalMisses.sum();
| 169 perProcCycleCount[i] = g_system_ptr->getCycleCount(i) - m_cycles_executed_at_start[i] + 1;
170 // The +1 allows us to avoid division by zero
171 }
172
173 integer_t total_misses = m_perProcTotalMisses.sum();
|
198 integer_t instruction_executed = perProcInstructionCount.sum();
| |
199 integer_t simics_cycles_executed = perProcCycleCount.sum();
200 integer_t transactions_started = m_perProcStartTransaction.sum();
201 integer_t transactions_ended = m_perProcEndTransaction.sum();
202
203 (*m_periodic_output_file_ptr) << "ruby_cycles: " << g_eventQueue_ptr->getTime()-m_ruby_start << endl;
204 (*m_periodic_output_file_ptr) << "total_misses: " << total_misses << " " << m_perProcTotalMisses << endl;
| 174 integer_t simics_cycles_executed = perProcCycleCount.sum();
175 integer_t transactions_started = m_perProcStartTransaction.sum();
176 integer_t transactions_ended = m_perProcEndTransaction.sum();
177
178 (*m_periodic_output_file_ptr) << "ruby_cycles: " << g_eventQueue_ptr->getTime()-m_ruby_start << endl;
179 (*m_periodic_output_file_ptr) << "total_misses: " << total_misses << " " << m_perProcTotalMisses << endl;
|
205 (*m_periodic_output_file_ptr) << "instruction_executed: " << instruction_executed << " " << perProcInstructionCount << endl;
| |
206 (*m_periodic_output_file_ptr) << "simics_cycles_executed: " << simics_cycles_executed << " " << perProcCycleCount << endl;
207 (*m_periodic_output_file_ptr) << "transactions_started: " << transactions_started << " " << m_perProcStartTransaction << endl;
208 (*m_periodic_output_file_ptr) << "transactions_ended: " << transactions_ended << " " << m_perProcEndTransaction << endl;
| 180 (*m_periodic_output_file_ptr) << "simics_cycles_executed: " << simics_cycles_executed << " " << perProcCycleCount << endl;
181 (*m_periodic_output_file_ptr) << "transactions_started: " << transactions_started << " " << m_perProcStartTransaction << endl;
182 (*m_periodic_output_file_ptr) << "transactions_ended: " << transactions_ended << " " << m_perProcEndTransaction << endl;
|
209 (*m_periodic_output_file_ptr) << "L1TBE_usage: " << m_L1tbeProfile << endl;
210 (*m_periodic_output_file_ptr) << "L2TBE_usage: " << m_L2tbeProfile << endl;
| |
211 (*m_periodic_output_file_ptr) << "mbytes_resident: " << process_memory_resident() << endl;
212 (*m_periodic_output_file_ptr) << "mbytes_total: " << process_memory_total() << endl;
213 if (process_memory_total() > 0) {
214 (*m_periodic_output_file_ptr) << "resident_ratio: " << process_memory_resident()/process_memory_total() << endl;
215 }
216 (*m_periodic_output_file_ptr) << "miss_latency: " << m_allMissLatencyHistogram << endl;
217
218 *m_periodic_output_file_ptr << endl;
219
220 if (m_all_instructions) {
221 m_inst_profiler_ptr->printStats(*m_periodic_output_file_ptr);
222 }
223
224 //g_system_ptr->getNetwork()->printStats(*m_periodic_output_file_ptr);
225 g_eventQueue_ptr->scheduleEvent(this, m_stats_period);
226}
227
228void Profiler::setPeriodicStatsFile(const string& filename)
229{
230 cout << "Recording periodic statistics to file '" << filename << "' every "
231 << m_stats_period << " Ruby cycles" << endl;
232
233 if (m_periodic_output_file_ptr != &cerr) {
234 delete m_periodic_output_file_ptr;
235 }
236
237 m_periodic_output_file_ptr = new ofstream(filename.c_str());
238 g_eventQueue_ptr->scheduleEvent(this, 1);
239}
240
241void Profiler::setPeriodicStatsInterval(integer_t period)
242{
243 cout << "Recording periodic statistics every " << m_stats_period << " Ruby cycles" << endl;
244 m_stats_period = period;
245 g_eventQueue_ptr->scheduleEvent(this, 1);
246}
247
248void Profiler::printConfig(ostream& out) const
249{
250 out << endl;
251 out << "Profiler Configuration" << endl;
252 out << "----------------------" << endl;
253 out << "periodic_stats_period: " << m_stats_period << endl;
254}
255
256void Profiler::print(ostream& out) const
257{
258 out << "[Profiler]";
259}
260
261void Profiler::printStats(ostream& out, bool short_stats)
262{
263 out << endl;
264 if (short_stats) {
265 out << "SHORT ";
266 }
267 out << "Profiler Stats" << endl;
268 out << "--------------" << endl;
269
270 time_t real_time_current = time(NULL);
271 double seconds = difftime(real_time_current, m_real_time_start_time);
272 double minutes = seconds/60.0;
273 double hours = minutes/60.0;
274 double days = hours/24.0;
275 Time ruby_cycles = g_eventQueue_ptr->getTime()-m_ruby_start;
276
277 if (!short_stats) {
278 out << "Elapsed_time_in_seconds: " << seconds << endl;
279 out << "Elapsed_time_in_minutes: " << minutes << endl;
280 out << "Elapsed_time_in_hours: " << hours << endl;
281 out << "Elapsed_time_in_days: " << days << endl;
282 out << endl;
283 }
284
285 // print the virtual runtimes as well
286 struct tms vtime;
287 times(&vtime);
288 seconds = (vtime.tms_utime + vtime.tms_stime) / 100.0;
289 minutes = seconds / 60.0;
290 hours = minutes / 60.0;
291 days = hours / 24.0;
292 out << "Virtual_time_in_seconds: " << seconds << endl;
293 out << "Virtual_time_in_minutes: " << minutes << endl;
294 out << "Virtual_time_in_hours: " << hours << endl;
| 183 (*m_periodic_output_file_ptr) << "mbytes_resident: " << process_memory_resident() << endl;
184 (*m_periodic_output_file_ptr) << "mbytes_total: " << process_memory_total() << endl;
185 if (process_memory_total() > 0) {
186 (*m_periodic_output_file_ptr) << "resident_ratio: " << process_memory_resident()/process_memory_total() << endl;
187 }
188 (*m_periodic_output_file_ptr) << "miss_latency: " << m_allMissLatencyHistogram << endl;
189
190 *m_periodic_output_file_ptr << endl;
191
192 if (m_all_instructions) {
193 m_inst_profiler_ptr->printStats(*m_periodic_output_file_ptr);
194 }
195
196 //g_system_ptr->getNetwork()->printStats(*m_periodic_output_file_ptr);
197 g_eventQueue_ptr->scheduleEvent(this, m_stats_period);
198}
199
200void Profiler::setPeriodicStatsFile(const string& filename)
201{
202 cout << "Recording periodic statistics to file '" << filename << "' every "
203 << m_stats_period << " Ruby cycles" << endl;
204
205 if (m_periodic_output_file_ptr != &cerr) {
206 delete m_periodic_output_file_ptr;
207 }
208
209 m_periodic_output_file_ptr = new ofstream(filename.c_str());
210 g_eventQueue_ptr->scheduleEvent(this, 1);
211}
212
213void Profiler::setPeriodicStatsInterval(integer_t period)
214{
215 cout << "Recording periodic statistics every " << m_stats_period << " Ruby cycles" << endl;
216 m_stats_period = period;
217 g_eventQueue_ptr->scheduleEvent(this, 1);
218}
219
220void Profiler::printConfig(ostream& out) const
221{
222 out << endl;
223 out << "Profiler Configuration" << endl;
224 out << "----------------------" << endl;
225 out << "periodic_stats_period: " << m_stats_period << endl;
226}
227
228void Profiler::print(ostream& out) const
229{
230 out << "[Profiler]";
231}
232
233void Profiler::printStats(ostream& out, bool short_stats)
234{
235 out << endl;
236 if (short_stats) {
237 out << "SHORT ";
238 }
239 out << "Profiler Stats" << endl;
240 out << "--------------" << endl;
241
242 time_t real_time_current = time(NULL);
243 double seconds = difftime(real_time_current, m_real_time_start_time);
244 double minutes = seconds/60.0;
245 double hours = minutes/60.0;
246 double days = hours/24.0;
247 Time ruby_cycles = g_eventQueue_ptr->getTime()-m_ruby_start;
248
249 if (!short_stats) {
250 out << "Elapsed_time_in_seconds: " << seconds << endl;
251 out << "Elapsed_time_in_minutes: " << minutes << endl;
252 out << "Elapsed_time_in_hours: " << hours << endl;
253 out << "Elapsed_time_in_days: " << days << endl;
254 out << endl;
255 }
256
257 // print the virtual runtimes as well
258 struct tms vtime;
259 times(&vtime);
260 seconds = (vtime.tms_utime + vtime.tms_stime) / 100.0;
261 minutes = seconds / 60.0;
262 hours = minutes / 60.0;
263 days = hours / 24.0;
264 out << "Virtual_time_in_seconds: " << seconds << endl;
265 out << "Virtual_time_in_minutes: " << minutes << endl;
266 out << "Virtual_time_in_hours: " << hours << endl;
|
295 out << "Virtual_time_in_days: " << hours << endl;
| 267 out << "Virtual_time_in_days: " << days << endl;
|
296 out << endl;
297
298 out << "Ruby_current_time: " << g_eventQueue_ptr->getTime() << endl;
299 out << "Ruby_start_time: " << m_ruby_start << endl;
300 out << "Ruby_cycles: " << ruby_cycles << endl;
301 out << endl;
302
303 if (!short_stats) {
304 out << "mbytes_resident: " << process_memory_resident() << endl;
305 out << "mbytes_total: " << process_memory_total() << endl;
306 if (process_memory_total() > 0) {
307 out << "resident_ratio: " << process_memory_resident()/process_memory_total() << endl;
308 }
309 out << endl;
310
| 268 out << endl;
269
270 out << "Ruby_current_time: " << g_eventQueue_ptr->getTime() << endl;
271 out << "Ruby_start_time: " << m_ruby_start << endl;
272 out << "Ruby_cycles: " << ruby_cycles << endl;
273 out << endl;
274
275 if (!short_stats) {
276 out << "mbytes_resident: " << process_memory_resident() << endl;
277 out << "mbytes_total: " << process_memory_total() << endl;
278 if (process_memory_total() > 0) {
279 out << "resident_ratio: " << process_memory_resident()/process_memory_total() << endl;
280 }
281 out << endl;
282
|
311 if(m_num_BA_broadcasts + m_num_BA_unicasts != 0){
312 out << endl;
313 out << "Broadcast_percent: " << (float)m_num_BA_broadcasts/(m_num_BA_broadcasts+m_num_BA_unicasts) << endl;
314 }
| |
315 }
316
| 283 }
284
|
317 Vector<integer_t> perProcInstructionCount;
| |
318 Vector<integer_t> perProcCycleCount;
| 285 Vector<integer_t> perProcCycleCount;
|
319 Vector<double> perProcCPI;
320 Vector<double> perProcMissesPerInsn;
321 Vector<double> perProcInsnPerTrans;
| |
322 Vector<double> perProcCyclesPerTrans;
323 Vector<double> perProcMissesPerTrans;
324
| 286 Vector<double> perProcCyclesPerTrans;
287 Vector<double> perProcMissesPerTrans;
288
|
325 perProcInstructionCount.setSize(RubySystem::getNumberOfSequencers());
326 perProcCycleCount.setSize(RubySystem::getNumberOfSequencers());
327 perProcCPI.setSize(RubySystem::getNumberOfSequencers());
328 perProcMissesPerInsn.setSize(RubySystem::getNumberOfSequencers());
| |
329
| 289
|
330 perProcInsnPerTrans.setSize(RubySystem::getNumberOfSequencers());
| 290 perProcCycleCount.setSize(RubySystem::getNumberOfSequencers());
|
331 perProcCyclesPerTrans.setSize(RubySystem::getNumberOfSequencers());
332 perProcMissesPerTrans.setSize(RubySystem::getNumberOfSequencers());
333
334 for(int i=0; i < RubySystem::getNumberOfSequencers(); i++) {
| 291 perProcCyclesPerTrans.setSize(RubySystem::getNumberOfSequencers());
292 perProcMissesPerTrans.setSize(RubySystem::getNumberOfSequencers());
293
294 for(int i=0; i < RubySystem::getNumberOfSequencers(); i++) {
|
335 perProcInstructionCount[i] = g_system_ptr->getInstructionCount(i) - m_instructions_executed_at_start[i] + 1;
| |
336 perProcCycleCount[i] = g_system_ptr->getCycleCount(i) - m_cycles_executed_at_start[i] + 1;
337 // The +1 allows us to avoid division by zero
| 295 perProcCycleCount[i] = g_system_ptr->getCycleCount(i) - m_cycles_executed_at_start[i] + 1;
296 // The +1 allows us to avoid division by zero
|
338 perProcCPI[i] = double(ruby_cycles)/perProcInstructionCount[i];
339 perProcMissesPerInsn[i] = 1000.0 * (double(m_perProcTotalMisses[i]) / double(perProcInstructionCount[i]));
| |
340
341 int trans = m_perProcEndTransaction[i];
342 if (trans == 0) {
| 297
298 int trans = m_perProcEndTransaction[i];
299 if (trans == 0) {
|
343 perProcInsnPerTrans[i] = 0;
| |
344 perProcCyclesPerTrans[i] = 0;
345 perProcMissesPerTrans[i] = 0;
346 } else {
| 300 perProcCyclesPerTrans[i] = 0;
301 perProcMissesPerTrans[i] = 0;
302 } else {
|
347 perProcInsnPerTrans[i] = perProcInstructionCount[i] / double(trans);
| |
348 perProcCyclesPerTrans[i] = ruby_cycles / double(trans);
349 perProcMissesPerTrans[i] = m_perProcTotalMisses[i] / double(trans);
350 }
351 }
352
353 integer_t total_misses = m_perProcTotalMisses.sum();
354 integer_t user_misses = m_perProcUserMisses.sum();
355 integer_t supervisor_misses = m_perProcSupervisorMisses.sum();
| 303 perProcCyclesPerTrans[i] = ruby_cycles / double(trans);
304 perProcMissesPerTrans[i] = m_perProcTotalMisses[i] / double(trans);
305 }
306 }
307
308 integer_t total_misses = m_perProcTotalMisses.sum();
309 integer_t user_misses = m_perProcUserMisses.sum();
310 integer_t supervisor_misses = m_perProcSupervisorMisses.sum();
|
356 integer_t instruction_executed = perProcInstructionCount.sum();
| |
357 integer_t simics_cycles_executed = perProcCycleCount.sum();
358 integer_t transactions_started = m_perProcStartTransaction.sum();
359 integer_t transactions_ended = m_perProcEndTransaction.sum();
360
| 311 integer_t simics_cycles_executed = perProcCycleCount.sum();
312 integer_t transactions_started = m_perProcStartTransaction.sum();
313 integer_t transactions_ended = m_perProcEndTransaction.sum();
314
|
361 double instructions_per_transaction = (transactions_ended != 0) ? double(instruction_executed) / double(transactions_ended) : 0;
| |
362 double cycles_per_transaction = (transactions_ended != 0) ? (RubySystem::getNumberOfSequencers() * double(ruby_cycles)) / double(transactions_ended) : 0;
363 double misses_per_transaction = (transactions_ended != 0) ? double(total_misses) / double(transactions_ended) : 0;
364
365 out << "Total_misses: " << total_misses << endl;
366 out << "total_misses: " << total_misses << " " << m_perProcTotalMisses << endl;
367 out << "user_misses: " << user_misses << " " << m_perProcUserMisses << endl;
368 out << "supervisor_misses: " << supervisor_misses << " " << m_perProcSupervisorMisses << endl;
369 out << endl;
| 315 double cycles_per_transaction = (transactions_ended != 0) ? (RubySystem::getNumberOfSequencers() * double(ruby_cycles)) / double(transactions_ended) : 0;
316 double misses_per_transaction = (transactions_ended != 0) ? double(total_misses) / double(transactions_ended) : 0;
317
318 out << "Total_misses: " << total_misses << endl;
319 out << "total_misses: " << total_misses << " " << m_perProcTotalMisses << endl;
320 out << "user_misses: " << user_misses << " " << m_perProcUserMisses << endl;
321 out << "supervisor_misses: " << supervisor_misses << " " << m_perProcSupervisorMisses << endl;
322 out << endl;
|
370 out << "instruction_executed: " << instruction_executed << " " << perProcInstructionCount << endl;
| |
371 out << "ruby_cycles_executed: " << simics_cycles_executed << " " << perProcCycleCount << endl;
| 323 out << "ruby_cycles_executed: " << simics_cycles_executed << " " << perProcCycleCount << endl;
|
372 out << "cycles_per_instruction: " << (RubySystem::getNumberOfSequencers()*double(ruby_cycles))/double(instruction_executed) << " " << perProcCPI << endl;
373 out << "misses_per_thousand_instructions: " << 1000.0 * (double(total_misses) / double(instruction_executed)) << " " << perProcMissesPerInsn << endl;
| |
374 out << endl;
375 out << "transactions_started: " << transactions_started << " " << m_perProcStartTransaction << endl;
376 out << "transactions_ended: " << transactions_ended << " " << m_perProcEndTransaction << endl;
| 324 out << endl;
325 out << "transactions_started: " << transactions_started << " " << m_perProcStartTransaction << endl;
326 out << "transactions_ended: " << transactions_ended << " " << m_perProcEndTransaction << endl;
|
377 out << "instructions_per_transaction: " << instructions_per_transaction << " " << perProcInsnPerTrans << endl;
| |
378 out << "cycles_per_transaction: " << cycles_per_transaction << " " << perProcCyclesPerTrans << endl;
379 out << "misses_per_transaction: " << misses_per_transaction << " " << perProcMissesPerTrans << endl;
380
381 out << endl;
382
| 327 out << "cycles_per_transaction: " << cycles_per_transaction << " " << perProcCyclesPerTrans << endl;
328 out << "misses_per_transaction: " << misses_per_transaction << " " << perProcMissesPerTrans << endl;
329
330 out << endl;
331
|
383 // m_L1D_cache_profiler_ptr->printStats(out);
384 // m_L1I_cache_profiler_ptr->printStats(out);
385 // m_L2_cache_profiler_ptr->printStats(out);
386
| |
387 out << endl;
388
389 vector<string>::iterator it;
390
391 for ( it=m_memory_control_names.begin() ; it < m_memory_control_names.end(); it++ ){
392 long long int m_memReq = m_memory_control_profilers[(*it).c_str()] -> m_memReq;
393 long long int m_memRefresh = m_memory_control_profilers[(*it).c_str()] -> m_memRefresh;
394 long long int m_memInputQ = m_memory_control_profilers[(*it).c_str()] -> m_memInputQ;
395 long long int m_memBankQ = m_memory_control_profilers[(*it).c_str()] -> m_memBankQ;
396 long long int m_memWaitCycles = m_memory_control_profilers[(*it).c_str()] -> m_memWaitCycles;
397 long long int m_memRead = m_memory_control_profilers[(*it).c_str()] -> m_memRead;
398 long long int m_memWrite = m_memory_control_profilers[(*it).c_str()] -> m_memWrite;
399 long long int m_memBankBusy = m_memory_control_profilers[(*it).c_str()] -> m_memBankBusy;
400 long long int m_memRandBusy = m_memory_control_profilers[(*it).c_str()] -> m_memRandBusy;
401 long long int m_memNotOld = m_memory_control_profilers[(*it).c_str()] -> m_memNotOld;
402 long long int m_memArbWait = m_memory_control_profilers[(*it).c_str()] -> m_memArbWait;
403 long long int m_memBusBusy = m_memory_control_profilers[(*it).c_str()] -> m_memBusBusy;
404 long long int m_memTfawBusy = m_memory_control_profilers[(*it).c_str()] -> m_memTfawBusy;
405 long long int m_memReadWriteBusy = m_memory_control_profilers[(*it).c_str()] -> m_memReadWriteBusy;
406 long long int m_memDataBusBusy = m_memory_control_profilers[(*it).c_str()] -> m_memDataBusBusy;
407 Vector<long long int> m_memBankCount = m_memory_control_profilers[(*it).c_str()] -> m_memBankCount;
408
409 if (m_memReq || m_memRefresh) { // if there's a memory controller at all
410 long long int total_stalls = m_memInputQ + m_memBankQ + m_memWaitCycles;
411 double stallsPerReq = total_stalls * 1.0 / m_memReq;
| 332 out << endl;
333
334 vector<string>::iterator it;
335
336 for ( it=m_memory_control_names.begin() ; it < m_memory_control_names.end(); it++ ){
337 long long int m_memReq = m_memory_control_profilers[(*it).c_str()] -> m_memReq;
338 long long int m_memRefresh = m_memory_control_profilers[(*it).c_str()] -> m_memRefresh;
339 long long int m_memInputQ = m_memory_control_profilers[(*it).c_str()] -> m_memInputQ;
340 long long int m_memBankQ = m_memory_control_profilers[(*it).c_str()] -> m_memBankQ;
341 long long int m_memWaitCycles = m_memory_control_profilers[(*it).c_str()] -> m_memWaitCycles;
342 long long int m_memRead = m_memory_control_profilers[(*it).c_str()] -> m_memRead;
343 long long int m_memWrite = m_memory_control_profilers[(*it).c_str()] -> m_memWrite;
344 long long int m_memBankBusy = m_memory_control_profilers[(*it).c_str()] -> m_memBankBusy;
345 long long int m_memRandBusy = m_memory_control_profilers[(*it).c_str()] -> m_memRandBusy;
346 long long int m_memNotOld = m_memory_control_profilers[(*it).c_str()] -> m_memNotOld;
347 long long int m_memArbWait = m_memory_control_profilers[(*it).c_str()] -> m_memArbWait;
348 long long int m_memBusBusy = m_memory_control_profilers[(*it).c_str()] -> m_memBusBusy;
349 long long int m_memTfawBusy = m_memory_control_profilers[(*it).c_str()] -> m_memTfawBusy;
350 long long int m_memReadWriteBusy = m_memory_control_profilers[(*it).c_str()] -> m_memReadWriteBusy;
351 long long int m_memDataBusBusy = m_memory_control_profilers[(*it).c_str()] -> m_memDataBusBusy;
352 Vector<long long int> m_memBankCount = m_memory_control_profilers[(*it).c_str()] -> m_memBankCount;
353
354 if (m_memReq || m_memRefresh) { // if there's a memory controller at all
355 long long int total_stalls = m_memInputQ + m_memBankQ + m_memWaitCycles;
356 double stallsPerReq = total_stalls * 1.0 / m_memReq;
|
412 out << "Memory control:" << endl;
| 357 out << "Memory control " << (*it) << ":" << endl;
|
413 out << " memory_total_requests: " << m_memReq << endl; // does not include refreshes
414 out << " memory_reads: " << m_memRead << endl;
415 out << " memory_writes: " << m_memWrite << endl;
416 out << " memory_refreshes: " << m_memRefresh << endl;
417 out << " memory_total_request_delays: " << total_stalls << endl;
418 out << " memory_delays_per_request: " << stallsPerReq << endl;
419 out << " memory_delays_in_input_queue: " << m_memInputQ << endl;
420 out << " memory_delays_behind_head_of_bank_queue: " << m_memBankQ << endl;
421 out << " memory_delays_stalled_at_head_of_bank_queue: " << m_memWaitCycles << endl;
422 // Note: The following "memory stalls" entries are a breakdown of the
423 // cycles which already showed up in m_memWaitCycles. The order is
424 // significant; it is the priority of attributing the cycles.
425 // For example, bank_busy is before arbitration because if the bank was
426 // busy, we didn't even check arbitration.
427 // Note: "not old enough" means that since we grouped waiting heads-of-queues
428 // into batches to avoid starvation, a request in a newer batch
429 // didn't try to arbitrate yet because there are older requests waiting.
430 out << " memory_stalls_for_bank_busy: " << m_memBankBusy << endl;
431 out << " memory_stalls_for_random_busy: " << m_memRandBusy << endl;
432 out << " memory_stalls_for_anti_starvation: " << m_memNotOld << endl;
433 out << " memory_stalls_for_arbitration: " << m_memArbWait << endl;
434 out << " memory_stalls_for_bus: " << m_memBusBusy << endl;
435 out << " memory_stalls_for_tfaw: " << m_memTfawBusy << endl;
436 out << " memory_stalls_for_read_write_turnaround: " << m_memReadWriteBusy << endl;
437 out << " memory_stalls_for_read_read_turnaround: " << m_memDataBusBusy << endl;
438 out << " accesses_per_bank: ";
439 for (int bank=0; bank < m_memBankCount.size(); bank++) {
440 out << m_memBankCount[bank] << " ";
441 //if ((bank % 8) == 7) out << " " << endl;
442 }
443 out << endl;
444 out << endl;
445 }
446 }
447 if (!short_stats) {
448 out << "Busy Controller Counts:" << endl;
449 for(int i=0; i < MachineType_NUM; i++) {
450 for(int j=0; j < MachineType_base_count((MachineType)i); j++) {
451 MachineID machID;
452 machID.type = (MachineType)i;
453 machID.num = j;
454 out << machID << ":" << m_busyControllerCount[i][j] << " ";
455 if ((j+1)%8 == 0) {
456 out << endl;
457 }
458 }
459 out << endl;
460 }
461 out << endl;
462
463 out << "Busy Bank Count:" << m_busyBankCount << endl;
464 out << endl;
465
| 358 out << " memory_total_requests: " << m_memReq << endl; // does not include refreshes
359 out << " memory_reads: " << m_memRead << endl;
360 out << " memory_writes: " << m_memWrite << endl;
361 out << " memory_refreshes: " << m_memRefresh << endl;
362 out << " memory_total_request_delays: " << total_stalls << endl;
363 out << " memory_delays_per_request: " << stallsPerReq << endl;
364 out << " memory_delays_in_input_queue: " << m_memInputQ << endl;
365 out << " memory_delays_behind_head_of_bank_queue: " << m_memBankQ << endl;
366 out << " memory_delays_stalled_at_head_of_bank_queue: " << m_memWaitCycles << endl;
367 // Note: The following "memory stalls" entries are a breakdown of the
368 // cycles which already showed up in m_memWaitCycles. The order is
369 // significant; it is the priority of attributing the cycles.
370 // For example, bank_busy is before arbitration because if the bank was
371 // busy, we didn't even check arbitration.
372 // Note: "not old enough" means that since we grouped waiting heads-of-queues
373 // into batches to avoid starvation, a request in a newer batch
374 // didn't try to arbitrate yet because there are older requests waiting.
375 out << " memory_stalls_for_bank_busy: " << m_memBankBusy << endl;
376 out << " memory_stalls_for_random_busy: " << m_memRandBusy << endl;
377 out << " memory_stalls_for_anti_starvation: " << m_memNotOld << endl;
378 out << " memory_stalls_for_arbitration: " << m_memArbWait << endl;
379 out << " memory_stalls_for_bus: " << m_memBusBusy << endl;
380 out << " memory_stalls_for_tfaw: " << m_memTfawBusy << endl;
381 out << " memory_stalls_for_read_write_turnaround: " << m_memReadWriteBusy << endl;
382 out << " memory_stalls_for_read_read_turnaround: " << m_memDataBusBusy << endl;
383 out << " accesses_per_bank: ";
384 for (int bank=0; bank < m_memBankCount.size(); bank++) {
385 out << m_memBankCount[bank] << " ";
386 //if ((bank % 8) == 7) out << " " << endl;
387 }
388 out << endl;
389 out << endl;
390 }
391 }
392 if (!short_stats) {
393 out << "Busy Controller Counts:" << endl;
394 for(int i=0; i < MachineType_NUM; i++) {
395 for(int j=0; j < MachineType_base_count((MachineType)i); j++) {
396 MachineID machID;
397 machID.type = (MachineType)i;
398 machID.num = j;
399 out << machID << ":" << m_busyControllerCount[i][j] << " ";
400 if ((j+1)%8 == 0) {
401 out << endl;
402 }
403 }
404 out << endl;
405 }
406 out << endl;
407
408 out << "Busy Bank Count:" << m_busyBankCount << endl;
409 out << endl;
410
|
466 out << "L1TBE_usage: " << m_L1tbeProfile << endl;
467 out << "L2TBE_usage: " << m_L2tbeProfile << endl;
468 out << "StopTable_usage: " << m_stopTableProfile << endl;
| |
469 out << "sequencer_requests_outstanding: " << m_sequencer_requests << endl;
| 411 out << "sequencer_requests_outstanding: " << m_sequencer_requests << endl;
|
470 out << "store_buffer_size: " << m_store_buffer_size << endl;
471 out << "unique_blocks_in_store_buffer: " << m_store_buffer_blocks << endl;
| |
472 out << endl;
473 }
474
475 if (!short_stats) {
476 out << "All Non-Zero Cycle Demand Cache Accesses" << endl;
477 out << "----------------------------------------" << endl;
478 out << "miss_latency: " << m_allMissLatencyHistogram << endl;
479 for(int i=0; i<m_missLatencyHistograms.size(); i++) {
480 if (m_missLatencyHistograms[i].size() > 0) {
481 out << "miss_latency_" << RubyRequestType(i) << ": " << m_missLatencyHistograms[i] << endl;
482 }
483 }
484 for(int i=0; i<m_machLatencyHistograms.size(); i++) {
485 if (m_machLatencyHistograms[i].size() > 0) {
486 out << "miss_latency_" << GenericMachineType(i) << ": " << m_machLatencyHistograms[i] << endl;
487 }
488 }
| 412 out << endl;
413 }
414
415 if (!short_stats) {
416 out << "All Non-Zero Cycle Demand Cache Accesses" << endl;
417 out << "----------------------------------------" << endl;
418 out << "miss_latency: " << m_allMissLatencyHistogram << endl;
419 for(int i=0; i<m_missLatencyHistograms.size(); i++) {
420 if (m_missLatencyHistograms[i].size() > 0) {
421 out << "miss_latency_" << RubyRequestType(i) << ": " << m_missLatencyHistograms[i] << endl;
422 }
423 }
424 for(int i=0; i<m_machLatencyHistograms.size(); i++) {
425 if (m_machLatencyHistograms[i].size() > 0) {
426 out << "miss_latency_" << GenericMachineType(i) << ": " << m_machLatencyHistograms[i] << endl;
427 }
428 }
|
489 out << "miss_latency_L2Miss: " << m_L2MissLatencyHistogram << endl;
| |
490
491 out << endl;
492
493 out << "All Non-Zero Cycle SW Prefetch Requests" << endl;
494 out << "------------------------------------" << endl;
495 out << "prefetch_latency: " << m_allSWPrefetchLatencyHistogram << endl;
496 for(int i=0; i<m_SWPrefetchLatencyHistograms.size(); i++) {
497 if (m_SWPrefetchLatencyHistograms[i].size() > 0) {
498 out << "prefetch_latency_" << CacheRequestType(i) << ": " << m_SWPrefetchLatencyHistograms[i] << endl;
499 }
500 }
501 for(int i=0; i<m_SWPrefetchMachLatencyHistograms.size(); i++) {
502 if (m_SWPrefetchMachLatencyHistograms[i].size() > 0) {
503 out << "prefetch_latency_" << GenericMachineType(i) << ": " << m_SWPrefetchMachLatencyHistograms[i] << endl;
504 }
505 }
506 out << "prefetch_latency_L2Miss:" << m_SWPrefetchL2MissLatencyHistogram << endl;
507
| 429
430 out << endl;
431
432 out << "All Non-Zero Cycle SW Prefetch Requests" << endl;
433 out << "------------------------------------" << endl;
434 out << "prefetch_latency: " << m_allSWPrefetchLatencyHistogram << endl;
435 for(int i=0; i<m_SWPrefetchLatencyHistograms.size(); i++) {
436 if (m_SWPrefetchLatencyHistograms[i].size() > 0) {
437 out << "prefetch_latency_" << CacheRequestType(i) << ": " << m_SWPrefetchLatencyHistograms[i] << endl;
438 }
439 }
440 for(int i=0; i<m_SWPrefetchMachLatencyHistograms.size(); i++) {
441 if (m_SWPrefetchMachLatencyHistograms[i].size() > 0) {
442 out << "prefetch_latency_" << GenericMachineType(i) << ": " << m_SWPrefetchMachLatencyHistograms[i] << endl;
443 }
444 }
445 out << "prefetch_latency_L2Miss:" << m_SWPrefetchL2MissLatencyHistogram << endl;
446
|
508 out << "multicast_retries: " << m_multicast_retry_histogram << endl;
509 out << "gets_mask_prediction_count: " << m_gets_mask_prediction << endl;
510 out << "getx_mask_prediction_count: " << m_getx_mask_prediction << endl;
511 out << "explicit_training_mask: " << m_explicit_training_mask << endl;
512 out << endl;
513
| |
514 if (m_all_sharing_histogram.size() > 0) {
515 out << "all_sharing: " << m_all_sharing_histogram << endl;
516 out << "read_sharing: " << m_read_sharing_histogram << endl;
517 out << "write_sharing: " << m_write_sharing_histogram << endl;
518
519 out << "all_sharing_percent: "; m_all_sharing_histogram.printPercent(out); out << endl;
520 out << "read_sharing_percent: "; m_read_sharing_histogram.printPercent(out); out << endl;
521 out << "write_sharing_percent: "; m_write_sharing_histogram.printPercent(out); out << endl;
522
523 int64 total_miss = m_cache_to_cache + m_memory_to_cache;
524 out << "all_misses: " << total_miss << endl;
525 out << "cache_to_cache_misses: " << m_cache_to_cache << endl;
526 out << "memory_to_cache_misses: " << m_memory_to_cache << endl;
527 out << "cache_to_cache_percent: " << 100.0 * (double(m_cache_to_cache) / double(total_miss)) << endl;
528 out << "memory_to_cache_percent: " << 100.0 * (double(m_memory_to_cache) / double(total_miss)) << endl;
529 out << endl;
530 }
531
| 447 if (m_all_sharing_histogram.size() > 0) {
448 out << "all_sharing: " << m_all_sharing_histogram << endl;
449 out << "read_sharing: " << m_read_sharing_histogram << endl;
450 out << "write_sharing: " << m_write_sharing_histogram << endl;
451
452 out << "all_sharing_percent: "; m_all_sharing_histogram.printPercent(out); out << endl;
453 out << "read_sharing_percent: "; m_read_sharing_histogram.printPercent(out); out << endl;
454 out << "write_sharing_percent: "; m_write_sharing_histogram.printPercent(out); out << endl;
455
456 int64 total_miss = m_cache_to_cache + m_memory_to_cache;
457 out << "all_misses: " << total_miss << endl;
458 out << "cache_to_cache_misses: " << m_cache_to_cache << endl;
459 out << "memory_to_cache_misses: " << m_memory_to_cache << endl;
460 out << "cache_to_cache_percent: " << 100.0 * (double(m_cache_to_cache) / double(total_miss)) << endl;
461 out << "memory_to_cache_percent: " << 100.0 * (double(m_memory_to_cache) / double(total_miss)) << endl;
462 out << endl;
463 }
464
|
532 if (m_conflicting_histogram.size() > 0) {
533 out << "conflicting_histogram: " << m_conflicting_histogram << endl;
534 out << "conflicting_histogram_percent: "; m_conflicting_histogram.printPercent(out); out << endl;
535 out << endl;
536 }
537
| |
538 if (m_outstanding_requests.size() > 0) {
539 out << "outstanding_requests: "; m_outstanding_requests.printPercent(out); out << endl;
| 465 if (m_outstanding_requests.size() > 0) {
466 out << "outstanding_requests: "; m_outstanding_requests.printPercent(out); out << endl;
|
540 if (m_outstanding_persistent_requests.size() > 0) {
541 out << "outstanding_persistent_requests: "; m_outstanding_persistent_requests.printPercent(out); out << endl;
542 }
| |
543 out << endl;
544 }
545 }
546
547 if (!short_stats) {
548 out << "Request vs. RubySystem State Profile" << endl;
549 out << "--------------------------------" << endl;
550 out << endl;
551
552 Vector<string> requestProfileKeys = m_requestProfileMap_ptr->keys();
553 requestProfileKeys.sortVector();
554
555 for(int i=0; i<requestProfileKeys.size(); i++) {
556 int temp_int = m_requestProfileMap_ptr->lookup(requestProfileKeys[i]);
557 double percent = (100.0*double(temp_int))/double(m_requests);
558 while (requestProfileKeys[i] != "") {
559 out << setw(10) << string_split(requestProfileKeys[i], ':');
560 }
561 out << setw(11) << temp_int;
562 out << setw(14) << percent << endl;
563 }
564 out << endl;
565
566 out << "filter_action: " << m_filter_action_histogram << endl;
567
568 if (!m_all_instructions) {
569 m_address_profiler_ptr->printStats(out);
570 }
571
572 if (m_all_instructions) {
573 m_inst_profiler_ptr->printStats(out);
574 }
575
576 out << endl;
577 out << "Message Delayed Cycles" << endl;
578 out << "----------------------" << endl;
579 out << "Total_delay_cycles: " << m_delayedCyclesHistogram << endl;
580 out << "Total_nonPF_delay_cycles: " << m_delayedCyclesNonPFHistogram << endl;
581 for (int i = 0; i < m_delayedCyclesVCHistograms.size(); i++) {
582 out << " virtual_network_" << i << "_delay_cycles: " << m_delayedCyclesVCHistograms[i] << endl;
583 }
584
585 printResourceUsage(out);
586 }
587
588}
589
590void Profiler::printResourceUsage(ostream& out) const
591{
592 out << endl;
593 out << "Resource Usage" << endl;
594 out << "--------------" << endl;
595
596 integer_t pagesize = getpagesize(); // page size in bytes
597 out << "page_size: " << pagesize << endl;
598
599 rusage usage;
600 getrusage (RUSAGE_SELF, &usage);
601
602 out << "user_time: " << usage.ru_utime.tv_sec << endl;
603 out << "system_time: " << usage.ru_stime.tv_sec << endl;
604 out << "page_reclaims: " << usage.ru_minflt << endl;
605 out << "page_faults: " << usage.ru_majflt << endl;
606 out << "swaps: " << usage.ru_nswap << endl;
607 out << "block_inputs: " << usage.ru_inblock << endl;
608 out << "block_outputs: " << usage.ru_oublock << endl;
609}
610
611void Profiler::clearStats()
612{
| 467 out << endl;
468 }
469 }
470
471 if (!short_stats) {
472 out << "Request vs. RubySystem State Profile" << endl;
473 out << "--------------------------------" << endl;
474 out << endl;
475
476 Vector<string> requestProfileKeys = m_requestProfileMap_ptr->keys();
477 requestProfileKeys.sortVector();
478
479 for(int i=0; i<requestProfileKeys.size(); i++) {
480 int temp_int = m_requestProfileMap_ptr->lookup(requestProfileKeys[i]);
481 double percent = (100.0*double(temp_int))/double(m_requests);
482 while (requestProfileKeys[i] != "") {
483 out << setw(10) << string_split(requestProfileKeys[i], ':');
484 }
485 out << setw(11) << temp_int;
486 out << setw(14) << percent << endl;
487 }
488 out << endl;
489
490 out << "filter_action: " << m_filter_action_histogram << endl;
491
492 if (!m_all_instructions) {
493 m_address_profiler_ptr->printStats(out);
494 }
495
496 if (m_all_instructions) {
497 m_inst_profiler_ptr->printStats(out);
498 }
499
500 out << endl;
501 out << "Message Delayed Cycles" << endl;
502 out << "----------------------" << endl;
503 out << "Total_delay_cycles: " << m_delayedCyclesHistogram << endl;
504 out << "Total_nonPF_delay_cycles: " << m_delayedCyclesNonPFHistogram << endl;
505 for (int i = 0; i < m_delayedCyclesVCHistograms.size(); i++) {
506 out << " virtual_network_" << i << "_delay_cycles: " << m_delayedCyclesVCHistograms[i] << endl;
507 }
508
509 printResourceUsage(out);
510 }
511
512}
513
514void Profiler::printResourceUsage(ostream& out) const
515{
516 out << endl;
517 out << "Resource Usage" << endl;
518 out << "--------------" << endl;
519
520 integer_t pagesize = getpagesize(); // page size in bytes
521 out << "page_size: " << pagesize << endl;
522
523 rusage usage;
524 getrusage (RUSAGE_SELF, &usage);
525
526 out << "user_time: " << usage.ru_utime.tv_sec << endl;
527 out << "system_time: " << usage.ru_stime.tv_sec << endl;
528 out << "page_reclaims: " << usage.ru_minflt << endl;
529 out << "page_faults: " << usage.ru_majflt << endl;
530 out << "swaps: " << usage.ru_nswap << endl;
531 out << "block_inputs: " << usage.ru_inblock << endl;
532 out << "block_outputs: " << usage.ru_oublock << endl;
533}
534
535void Profiler::clearStats()
536{
|
613 m_num_BA_unicasts = 0;
614 m_num_BA_broadcasts = 0;
615
| |
616 m_ruby_start = g_eventQueue_ptr->getTime();
617
| 537 m_ruby_start = g_eventQueue_ptr->getTime();
538
|
618 m_instructions_executed_at_start.setSize(RubySystem::getNumberOfSequencers());
| |
619 m_cycles_executed_at_start.setSize(RubySystem::getNumberOfSequencers());
620 for (int i=0; i < RubySystem::getNumberOfSequencers(); i++) {
621 if (g_system_ptr == NULL) {
| 539 m_cycles_executed_at_start.setSize(RubySystem::getNumberOfSequencers());
540 for (int i=0; i < RubySystem::getNumberOfSequencers(); i++) {
541 if (g_system_ptr == NULL) {
|
622 m_instructions_executed_at_start[i] = 0;
| |
623 m_cycles_executed_at_start[i] = 0;
624 } else {
| 542 m_cycles_executed_at_start[i] = 0;
543 } else {
|
625 m_instructions_executed_at_start[i] = g_system_ptr->getInstructionCount(i);
| |
626 m_cycles_executed_at_start[i] = g_system_ptr->getCycleCount(i);
627 }
628 }
629
630 m_perProcTotalMisses.setSize(RubySystem::getNumberOfSequencers());
631 m_perProcUserMisses.setSize(RubySystem::getNumberOfSequencers());
632 m_perProcSupervisorMisses.setSize(RubySystem::getNumberOfSequencers());
633 m_perProcStartTransaction.setSize(RubySystem::getNumberOfSequencers());
634 m_perProcEndTransaction.setSize(RubySystem::getNumberOfSequencers());
635
636 for(int i=0; i < RubySystem::getNumberOfSequencers(); i++) {
637 m_perProcTotalMisses[i] = 0;
638 m_perProcUserMisses[i] = 0;
639 m_perProcSupervisorMisses[i] = 0;
640 m_perProcStartTransaction[i] = 0;
641 m_perProcEndTransaction[i] = 0;
642 }
643
644 m_busyControllerCount.setSize(MachineType_NUM); // all machines
645 for(int i=0; i < MachineType_NUM; i++) {
646 m_busyControllerCount[i].setSize(MachineType_base_count((MachineType)i));
647 for(int j=0; j < MachineType_base_count((MachineType)i); j++) {
648 m_busyControllerCount[i][j] = 0;
649 }
650 }
651 m_busyBankCount = 0;
652
653 m_delayedCyclesHistogram.clear();
654 m_delayedCyclesNonPFHistogram.clear();
655 m_delayedCyclesVCHistograms.setSize(RubySystem::getNetwork()->getNumberOfVirtualNetworks());
656 for (int i = 0; i < RubySystem::getNetwork()->getNumberOfVirtualNetworks(); i++) {
657 m_delayedCyclesVCHistograms[i].clear();
658 }
659
| 544 m_cycles_executed_at_start[i] = g_system_ptr->getCycleCount(i);
545 }
546 }
547
548 m_perProcTotalMisses.setSize(RubySystem::getNumberOfSequencers());
549 m_perProcUserMisses.setSize(RubySystem::getNumberOfSequencers());
550 m_perProcSupervisorMisses.setSize(RubySystem::getNumberOfSequencers());
551 m_perProcStartTransaction.setSize(RubySystem::getNumberOfSequencers());
552 m_perProcEndTransaction.setSize(RubySystem::getNumberOfSequencers());
553
554 for(int i=0; i < RubySystem::getNumberOfSequencers(); i++) {
555 m_perProcTotalMisses[i] = 0;
556 m_perProcUserMisses[i] = 0;
557 m_perProcSupervisorMisses[i] = 0;
558 m_perProcStartTransaction[i] = 0;
559 m_perProcEndTransaction[i] = 0;
560 }
561
562 m_busyControllerCount.setSize(MachineType_NUM); // all machines
563 for(int i=0; i < MachineType_NUM; i++) {
564 m_busyControllerCount[i].setSize(MachineType_base_count((MachineType)i));
565 for(int j=0; j < MachineType_base_count((MachineType)i); j++) {
566 m_busyControllerCount[i][j] = 0;
567 }
568 }
569 m_busyBankCount = 0;
570
571 m_delayedCyclesHistogram.clear();
572 m_delayedCyclesNonPFHistogram.clear();
573 m_delayedCyclesVCHistograms.setSize(RubySystem::getNetwork()->getNumberOfVirtualNetworks());
574 for (int i = 0; i < RubySystem::getNetwork()->getNumberOfVirtualNetworks(); i++) {
575 m_delayedCyclesVCHistograms[i].clear();
576 }
577
|
660 m_gets_mask_prediction.clear();
661 m_getx_mask_prediction.clear();
662 m_explicit_training_mask.clear();
663
664 m_missLatencyHistograms.setSize(CacheRequestType_NUM);
| 578 m_missLatencyHistograms.setSize(RubyRequestType_NUM);
|
665 for(int i=0; i<m_missLatencyHistograms.size(); i++) {
666 m_missLatencyHistograms[i].clear(200);
667 }
668 m_machLatencyHistograms.setSize(GenericMachineType_NUM+1);
669 for(int i=0; i<m_machLatencyHistograms.size(); i++) {
670 m_machLatencyHistograms[i].clear(200);
671 }
672 m_allMissLatencyHistogram.clear(200);
| 579 for(int i=0; i<m_missLatencyHistograms.size(); i++) {
580 m_missLatencyHistograms[i].clear(200);
581 }
582 m_machLatencyHistograms.setSize(GenericMachineType_NUM+1);
583 for(int i=0; i<m_machLatencyHistograms.size(); i++) {
584 m_machLatencyHistograms[i].clear(200);
585 }
586 m_allMissLatencyHistogram.clear(200);
|
673 m_L2MissLatencyHistogram.clear(200);
| |
674
675 m_SWPrefetchLatencyHistograms.setSize(CacheRequestType_NUM);
676 for(int i=0; i<m_SWPrefetchLatencyHistograms.size(); i++) {
677 m_SWPrefetchLatencyHistograms[i].clear(200);
678 }
679 m_SWPrefetchMachLatencyHistograms.setSize(GenericMachineType_NUM+1);
680 for(int i=0; i<m_SWPrefetchMachLatencyHistograms.size(); i++) {
681 m_SWPrefetchMachLatencyHistograms[i].clear(200);
682 }
683 m_allSWPrefetchLatencyHistogram.clear(200);
| 587
588 m_SWPrefetchLatencyHistograms.setSize(CacheRequestType_NUM);
589 for(int i=0; i<m_SWPrefetchLatencyHistograms.size(); i++) {
590 m_SWPrefetchLatencyHistograms[i].clear(200);
591 }
592 m_SWPrefetchMachLatencyHistograms.setSize(GenericMachineType_NUM+1);
593 for(int i=0; i<m_SWPrefetchMachLatencyHistograms.size(); i++) {
594 m_SWPrefetchMachLatencyHistograms[i].clear(200);
595 }
596 m_allSWPrefetchLatencyHistogram.clear(200);
|
684 m_SWPrefetchL2MissLatencyHistogram.clear(200);
| |
685
| 597
|
686 m_multicast_retry_histogram.clear();
687
688 m_L1tbeProfile.clear();
689 m_L2tbeProfile.clear();
690 m_stopTableProfile.clear();
691 m_filter_action_histogram.clear();
692
| |
693 m_sequencer_requests.clear();
| 598 m_sequencer_requests.clear();
|
694 m_store_buffer_size.clear();
695 m_store_buffer_blocks.clear();
| |
696 m_read_sharing_histogram.clear();
697 m_write_sharing_histogram.clear();
698 m_all_sharing_histogram.clear();
699 m_cache_to_cache = 0;
700 m_memory_to_cache = 0;
701
| 599 m_read_sharing_histogram.clear();
600 m_write_sharing_histogram.clear();
601 m_all_sharing_histogram.clear();
602 m_cache_to_cache = 0;
603 m_memory_to_cache = 0;
604
|
702 m_predictions = 0;
703 m_predictionOpportunities = 0;
704 m_goodPredictions = 0;
705
| |
706 // clear HashMaps
707 m_requestProfileMap_ptr->clear();
708
709 // count requests profiled
710 m_requests = 0;
711
| 605 // clear HashMaps
606 m_requestProfileMap_ptr->clear();
607
608 // count requests profiled
609 m_requests = 0;
610
|
712 // Conflicting requests
713 m_conflicting_map_ptr->clear();
714 m_conflicting_histogram.clear();
715
| |
716 m_outstanding_requests.clear();
717 m_outstanding_persistent_requests.clear();
718
| 611 m_outstanding_requests.clear();
612 m_outstanding_persistent_requests.clear();
613
|
719 m_L1D_cache_profiler_ptr->clearStats();
720 m_L1I_cache_profiler_ptr->clearStats();
721 m_L2_cache_profiler_ptr->clearStats();
722
723 // for MemoryControl:
724/*
725 m_memReq = 0;
726 m_memBankBusy = 0;
727 m_memBusBusy = 0;
728 m_memTfawBusy = 0;
729 m_memReadWriteBusy = 0;
730 m_memDataBusBusy = 0;
731 m_memRefresh = 0;
732 m_memRead = 0;
733 m_memWrite = 0;
734 m_memWaitCycles = 0;
735 m_memInputQ = 0;
736 m_memBankQ = 0;
737 m_memArbWait = 0;
738 m_memRandBusy = 0;
739 m_memNotOld = 0;
740
741 for (int bank=0; bank < m_memBankCount.size(); bank++) {
742 m_memBankCount[bank] = 0;
743 }
744*/
| |
745//added by SS
746 vector<string>::iterator it;
747
748 for ( it=m_memory_control_names.begin() ; it < m_memory_control_names.end(); it++ ){
749 m_memory_control_profilers[(*it).c_str()] -> m_memReq = 0;
750 m_memory_control_profilers[(*it).c_str()] -> m_memBankBusy = 0;
751 m_memory_control_profilers[(*it).c_str()] -> m_memBusBusy = 0;
752 m_memory_control_profilers[(*it).c_str()] -> m_memTfawBusy = 0;
753 m_memory_control_profilers[(*it).c_str()] -> m_memReadWriteBusy = 0;
754 m_memory_control_profilers[(*it).c_str()] -> m_memDataBusBusy = 0;
755 m_memory_control_profilers[(*it).c_str()] -> m_memRefresh = 0;
756 m_memory_control_profilers[(*it).c_str()] -> m_memRead = 0;
757 m_memory_control_profilers[(*it).c_str()] -> m_memWrite = 0;
758 m_memory_control_profilers[(*it).c_str()] -> m_memWaitCycles = 0;
759 m_memory_control_profilers[(*it).c_str()] -> m_memInputQ = 0;
760 m_memory_control_profilers[(*it).c_str()] -> m_memBankQ = 0;
761 m_memory_control_profilers[(*it).c_str()] -> m_memArbWait = 0;
762 m_memory_control_profilers[(*it).c_str()] -> m_memRandBusy = 0;
763 m_memory_control_profilers[(*it).c_str()] -> m_memNotOld = 0;
764
765 for (int bank=0; bank < m_memory_control_profilers[(*it).c_str()] -> m_memBankCount.size(); bank++) {
766 m_memory_control_profilers[(*it).c_str()] -> m_memBankCount[bank] = 0;
767 }
768 }
769 // Flush the prefetches through the system - used so that there are no outstanding requests after stats are cleared
770 //g_eventQueue_ptr->triggerAllEvents();
771
772 // update the start time
773 m_ruby_start = g_eventQueue_ptr->getTime();
774}
775
| 614//added by SS
615 vector<string>::iterator it;
616
617 for ( it=m_memory_control_names.begin() ; it < m_memory_control_names.end(); it++ ){
618 m_memory_control_profilers[(*it).c_str()] -> m_memReq = 0;
619 m_memory_control_profilers[(*it).c_str()] -> m_memBankBusy = 0;
620 m_memory_control_profilers[(*it).c_str()] -> m_memBusBusy = 0;
621 m_memory_control_profilers[(*it).c_str()] -> m_memTfawBusy = 0;
622 m_memory_control_profilers[(*it).c_str()] -> m_memReadWriteBusy = 0;
623 m_memory_control_profilers[(*it).c_str()] -> m_memDataBusBusy = 0;
624 m_memory_control_profilers[(*it).c_str()] -> m_memRefresh = 0;
625 m_memory_control_profilers[(*it).c_str()] -> m_memRead = 0;
626 m_memory_control_profilers[(*it).c_str()] -> m_memWrite = 0;
627 m_memory_control_profilers[(*it).c_str()] -> m_memWaitCycles = 0;
628 m_memory_control_profilers[(*it).c_str()] -> m_memInputQ = 0;
629 m_memory_control_profilers[(*it).c_str()] -> m_memBankQ = 0;
630 m_memory_control_profilers[(*it).c_str()] -> m_memArbWait = 0;
631 m_memory_control_profilers[(*it).c_str()] -> m_memRandBusy = 0;
632 m_memory_control_profilers[(*it).c_str()] -> m_memNotOld = 0;
633
634 for (int bank=0; bank < m_memory_control_profilers[(*it).c_str()] -> m_memBankCount.size(); bank++) {
635 m_memory_control_profilers[(*it).c_str()] -> m_memBankCount[bank] = 0;
636 }
637 }
638 // Flush the prefetches through the system - used so that there are no outstanding requests after stats are cleared
639 //g_eventQueue_ptr->triggerAllEvents();
640
641 // update the start time
642 m_ruby_start = g_eventQueue_ptr->getTime();
643}
644
|
776void Profiler::profileConflictingRequests(const Address& addr)
777{
778 assert(addr == line_address(addr));
779 Time last_time = m_ruby_start;
780 if (m_conflicting_map_ptr->exist(addr)) {
781 last_time = m_conflicting_map_ptr->lookup(addr);
782 }
783 Time current_time = g_eventQueue_ptr->getTime();
784 assert (current_time - last_time > 0);
785 m_conflicting_histogram.add(current_time - last_time);
786 m_conflicting_map_ptr->add(addr, current_time);
787}
788
| |
789void Profiler::addAddressTraceSample(const CacheMsg& msg, NodeID id)
790{
791 if (msg.getType() != CacheRequestType_IFETCH) {
792
793 // Note: The following line should be commented out if you want to
794 // use the special profiling that is part of the GS320 protocol
795
796 // NOTE: Unless PROFILE_HOT_LINES is enabled, nothing will be profiled by the AddressProfiler
797 m_address_profiler_ptr->addTraceSample(msg.getLineAddress(), msg.getProgramCounter(), msg.getType(), msg.getAccessMode(), id, false);
798 }
799}
800
801void Profiler::profileSharing(const Address& addr, AccessType type, NodeID requestor, const Set& sharers, const Set& owner)
802{
803 Set set_contacted(owner);
804 if (type == AccessType_Write) {
805 set_contacted.addSet(sharers);
806 }
807 set_contacted.remove(requestor);
808 int number_contacted = set_contacted.count();
809
810 if (type == AccessType_Write) {
811 m_write_sharing_histogram.add(number_contacted);
812 } else {
813 m_read_sharing_histogram.add(number_contacted);
814 }
815 m_all_sharing_histogram.add(number_contacted);
816
817 if (number_contacted == 0) {
818 m_memory_to_cache++;
819 } else {
820 m_cache_to_cache++;
821 }
822
823}
824
825void Profiler::profileMsgDelay(int virtualNetwork, int delayCycles) {
826 assert(virtualNetwork < m_delayedCyclesVCHistograms.size());
827 m_delayedCyclesHistogram.add(delayCycles);
828 m_delayedCyclesVCHistograms[virtualNetwork].add(delayCycles);
829 if (virtualNetwork != 0) {
830 m_delayedCyclesNonPFHistogram.add(delayCycles);
831 }
832}
833
834// profiles original cache requests including PUTs
835void Profiler::profileRequest(const string& requestStr)
836{
837 m_requests++;
838
839 if (m_requestProfileMap_ptr->exist(requestStr)) {
840 (m_requestProfileMap_ptr->lookup(requestStr))++;
841 } else {
842 m_requestProfileMap_ptr->add(requestStr, 1);
843 }
844}
845
| 645void Profiler::addAddressTraceSample(const CacheMsg& msg, NodeID id)
646{
647 if (msg.getType() != CacheRequestType_IFETCH) {
648
649 // Note: The following line should be commented out if you want to
650 // use the special profiling that is part of the GS320 protocol
651
652 // NOTE: Unless PROFILE_HOT_LINES is enabled, nothing will be profiled by the AddressProfiler
653 m_address_profiler_ptr->addTraceSample(msg.getLineAddress(), msg.getProgramCounter(), msg.getType(), msg.getAccessMode(), id, false);
654 }
655}
656
657void Profiler::profileSharing(const Address& addr, AccessType type, NodeID requestor, const Set& sharers, const Set& owner)
658{
659 Set set_contacted(owner);
660 if (type == AccessType_Write) {
661 set_contacted.addSet(sharers);
662 }
663 set_contacted.remove(requestor);
664 int number_contacted = set_contacted.count();
665
666 if (type == AccessType_Write) {
667 m_write_sharing_histogram.add(number_contacted);
668 } else {
669 m_read_sharing_histogram.add(number_contacted);
670 }
671 m_all_sharing_histogram.add(number_contacted);
672
673 if (number_contacted == 0) {
674 m_memory_to_cache++;
675 } else {
676 m_cache_to_cache++;
677 }
678
679}
680
681void Profiler::profileMsgDelay(int virtualNetwork, int delayCycles) {
682 assert(virtualNetwork < m_delayedCyclesVCHistograms.size());
683 m_delayedCyclesHistogram.add(delayCycles);
684 m_delayedCyclesVCHistograms[virtualNetwork].add(delayCycles);
685 if (virtualNetwork != 0) {
686 m_delayedCyclesNonPFHistogram.add(delayCycles);
687 }
688}
689
690// profiles original cache requests including PUTs
691void Profiler::profileRequest(const string& requestStr)
692{
693 m_requests++;
694
695 if (m_requestProfileMap_ptr->exist(requestStr)) {
696 (m_requestProfileMap_ptr->lookup(requestStr))++;
697 } else {
698 m_requestProfileMap_ptr->add(requestStr, 1);
699 }
700}
701
|
846void Profiler::recordPrediction(bool wasGood, bool wasPredicted)
847{
848 m_predictionOpportunities++;
849 if(wasPredicted){
850 m_predictions++;
851 if(wasGood){
852 m_goodPredictions++;
853 }
854 }
855}
856
857void Profiler::profileFilterAction(int action)
858{
859 m_filter_action_histogram.add(action);
860}
861
862void Profiler::profileMulticastRetry(const Address& addr, int count)
863{
864 m_multicast_retry_histogram.add(count);
865}
866
| |
867void Profiler::startTransaction(int cpu)
868{
869 m_perProcStartTransaction[cpu]++;
870}
871
872void Profiler::endTransaction(int cpu)
873{
874 m_perProcEndTransaction[cpu]++;
875}
876
877void Profiler::controllerBusy(MachineID machID)
878{
879 m_busyControllerCount[(int)machID.type][(int)machID.num]++;
880}
881
882void Profiler::profilePFWait(Time waitTime)
883{
884 m_prefetchWaitHistogram.add(waitTime);
885}
886
887void Profiler::bankBusy()
888{
889 m_busyBankCount++;
890}
891
892// non-zero cycle demand request
893void Profiler::missLatency(Time t, RubyRequestType type)
894{
895 m_allMissLatencyHistogram.add(t);
896 m_missLatencyHistograms[type].add(t);
| 702void Profiler::startTransaction(int cpu)
703{
704 m_perProcStartTransaction[cpu]++;
705}
706
707void Profiler::endTransaction(int cpu)
708{
709 m_perProcEndTransaction[cpu]++;
710}
711
712void Profiler::controllerBusy(MachineID machID)
713{
714 m_busyControllerCount[(int)machID.type][(int)machID.num]++;
715}
716
717void Profiler::profilePFWait(Time waitTime)
718{
719 m_prefetchWaitHistogram.add(waitTime);
720}
721
722void Profiler::bankBusy()
723{
724 m_busyBankCount++;
725}
726
727// non-zero cycle demand request
728void Profiler::missLatency(Time t, RubyRequestType type)
729{
730 m_allMissLatencyHistogram.add(t);
731 m_missLatencyHistograms[type].add(t);
|
897 /*
898 m_machLatencyHistograms[respondingMach].add(t);
899 if(respondingMach == GenericMachineType_Directory || respondingMach == GenericMachineType_NUM) {
900 m_L2MissLatencyHistogram.add(t);
901 }
902 */
| |
903}
904
905// non-zero cycle prefetch request
906void Profiler::swPrefetchLatency(Time t, CacheRequestType type, GenericMachineType respondingMach)
907{
908 m_allSWPrefetchLatencyHistogram.add(t);
909 m_SWPrefetchLatencyHistograms[type].add(t);
910 m_SWPrefetchMachLatencyHistograms[respondingMach].add(t);
911 if(respondingMach == GenericMachineType_Directory || respondingMach == GenericMachineType_NUM) {
912 m_SWPrefetchL2MissLatencyHistogram.add(t);
913 }
914}
915
916void Profiler::profileTransition(const string& component, NodeID version, Address addr,
917 const string& state, const string& event,
918 const string& next_state, const string& note)
919{
920 const int EVENT_SPACES = 20;
921 const int ID_SPACES = 3;
922 const int TIME_SPACES = 7;
923 const int COMP_SPACES = 10;
924 const int STATE_SPACES = 6;
925
926 if ((g_debug_ptr->getDebugTime() > 0) &&
927 (g_eventQueue_ptr->getTime() >= g_debug_ptr->getDebugTime())) {
928 (* debug_cout_ptr).flags(ios::right);
929 (* debug_cout_ptr) << setw(TIME_SPACES) << g_eventQueue_ptr->getTime() << " ";
930 (* debug_cout_ptr) << setw(ID_SPACES) << version << " ";
931 (* debug_cout_ptr) << setw(COMP_SPACES) << component;
932 (* debug_cout_ptr) << setw(EVENT_SPACES) << event << " ";
933
934 (* debug_cout_ptr).flags(ios::right);
935 (* debug_cout_ptr) << setw(STATE_SPACES) << state;
936 (* debug_cout_ptr) << ">";
937 (* debug_cout_ptr).flags(ios::left);
938 (* debug_cout_ptr) << setw(STATE_SPACES) << next_state;
939
940 (* debug_cout_ptr) << " " << addr << " " << note;
941
942 (* debug_cout_ptr) << endl;
943 }
944}
945
946// Helper function
947static double process_memory_total()
948{
949 const double MULTIPLIER = 4096.0/(1024.0*1024.0); // 4kB page size, 1024*1024 bytes per MB,
950 ifstream proc_file;
951 proc_file.open("/proc/self/statm");
952 int total_size_in_pages = 0;
953 int res_size_in_pages = 0;
954 proc_file >> total_size_in_pages;
955 proc_file >> res_size_in_pages;
956 return double(total_size_in_pages)*MULTIPLIER; // size in megabytes
957}
958
959static double process_memory_resident()
960{
961 const double MULTIPLIER = 4096.0/(1024.0*1024.0); // 4kB page size, 1024*1024 bytes per MB,
962 ifstream proc_file;
963 proc_file.open("/proc/self/statm");
964 int total_size_in_pages = 0;
965 int res_size_in_pages = 0;
966 proc_file >> total_size_in_pages;
967 proc_file >> res_size_in_pages;
968 return double(res_size_in_pages)*MULTIPLIER; // size in megabytes
969}
970
| 732}
733
734// non-zero cycle prefetch request
735void Profiler::swPrefetchLatency(Time t, CacheRequestType type, GenericMachineType respondingMach)
736{
737 m_allSWPrefetchLatencyHistogram.add(t);
738 m_SWPrefetchLatencyHistograms[type].add(t);
739 m_SWPrefetchMachLatencyHistograms[respondingMach].add(t);
740 if(respondingMach == GenericMachineType_Directory || respondingMach == GenericMachineType_NUM) {
741 m_SWPrefetchL2MissLatencyHistogram.add(t);
742 }
743}
744
745void Profiler::profileTransition(const string& component, NodeID version, Address addr,
746 const string& state, const string& event,
747 const string& next_state, const string& note)
748{
749 const int EVENT_SPACES = 20;
750 const int ID_SPACES = 3;
751 const int TIME_SPACES = 7;
752 const int COMP_SPACES = 10;
753 const int STATE_SPACES = 6;
754
755 if ((g_debug_ptr->getDebugTime() > 0) &&
756 (g_eventQueue_ptr->getTime() >= g_debug_ptr->getDebugTime())) {
757 (* debug_cout_ptr).flags(ios::right);
758 (* debug_cout_ptr) << setw(TIME_SPACES) << g_eventQueue_ptr->getTime() << " ";
759 (* debug_cout_ptr) << setw(ID_SPACES) << version << " ";
760 (* debug_cout_ptr) << setw(COMP_SPACES) << component;
761 (* debug_cout_ptr) << setw(EVENT_SPACES) << event << " ";
762
763 (* debug_cout_ptr).flags(ios::right);
764 (* debug_cout_ptr) << setw(STATE_SPACES) << state;
765 (* debug_cout_ptr) << ">";
766 (* debug_cout_ptr).flags(ios::left);
767 (* debug_cout_ptr) << setw(STATE_SPACES) << next_state;
768
769 (* debug_cout_ptr) << " " << addr << " " << note;
770
771 (* debug_cout_ptr) << endl;
772 }
773}
774
775// Helper function
776static double process_memory_total()
777{
778 const double MULTIPLIER = 4096.0/(1024.0*1024.0); // 4kB page size, 1024*1024 bytes per MB,
779 ifstream proc_file;
780 proc_file.open("/proc/self/statm");
781 int total_size_in_pages = 0;
782 int res_size_in_pages = 0;
783 proc_file >> total_size_in_pages;
784 proc_file >> res_size_in_pages;
785 return double(total_size_in_pages)*MULTIPLIER; // size in megabytes
786}
787
788static double process_memory_resident()
789{
790 const double MULTIPLIER = 4096.0/(1024.0*1024.0); // 4kB page size, 1024*1024 bytes per MB,
791 ifstream proc_file;
792 proc_file.open("/proc/self/statm");
793 int total_size_in_pages = 0;
794 int res_size_in_pages = 0;
795 proc_file >> total_size_in_pages;
796 proc_file >> res_size_in_pages;
797 return double(res_size_in_pages)*MULTIPLIER; // size in megabytes
798}
799
|
971void Profiler::profileGetXMaskPrediction(const Set& pred_set)
972{
973 m_getx_mask_prediction.add(pred_set.count());
974}
975
976void Profiler::profileGetSMaskPrediction(const Set& pred_set)
977{
978 m_gets_mask_prediction.add(pred_set.count());
979}
980
981void Profiler::profileTrainingMask(const Set& pred_set)
982{
983 m_explicit_training_mask.add(pred_set.count());
984}
985
986int64 Profiler::getTotalInstructionsExecuted() const
987{
988 int64 sum = 1; // Starting at 1 allows us to avoid division by zero
989 for(int i=0; i < RubySystem::getNumberOfSequencers(); i++) {
990 sum += (g_system_ptr->getInstructionCount(i) - m_instructions_executed_at_start[i]);
991 }
992 return sum;
993}
994
995int64 Profiler::getTotalTransactionsExecuted() const
996{
997 int64 sum = m_perProcEndTransaction.sum();
998 if (sum > 0) {
999 return sum;
1000 } else {
1001 return 1; // Avoid division by zero errors
1002 }
1003}
1004
1005
| |
1006void Profiler::rubyWatch(int id){
1007 //int rn_g1 = 0;//SIMICS_get_register_number(id, "g1");
1008 uint64 tr = 0;//SIMICS_read_register(id, rn_g1);
1009 Address watch_address = Address(tr);
1010 const int ID_SPACES = 3;
1011 const int TIME_SPACES = 7;
1012
1013 (* debug_cout_ptr).flags(ios::right);
1014 (* debug_cout_ptr) << setw(TIME_SPACES) << g_eventQueue_ptr->getTime() << " ";
1015 (* debug_cout_ptr) << setw(ID_SPACES) << id << " "
1016 << "RUBY WATCH "
1017 << watch_address
1018 << endl;
1019
1020 if(!m_watch_address_list_ptr->exist(watch_address)){
1021 m_watch_address_list_ptr->add(watch_address, 1);
1022 }
1023}
1024
1025bool Profiler::watchAddress(Address addr){
1026 if (m_watch_address_list_ptr->exist(addr))
1027 return true;
1028 else
1029 return false;
1030}
1031
| 800void Profiler::rubyWatch(int id){
801 //int rn_g1 = 0;//SIMICS_get_register_number(id, "g1");
802 uint64 tr = 0;//SIMICS_read_register(id, rn_g1);
803 Address watch_address = Address(tr);
804 const int ID_SPACES = 3;
805 const int TIME_SPACES = 7;
806
807 (* debug_cout_ptr).flags(ios::right);
808 (* debug_cout_ptr) << setw(TIME_SPACES) << g_eventQueue_ptr->getTime() << " ";
809 (* debug_cout_ptr) << setw(ID_SPACES) << id << " "
810 << "RUBY WATCH "
811 << watch_address
812 << endl;
813
814 if(!m_watch_address_list_ptr->exist(watch_address)){
815 m_watch_address_list_ptr->add(watch_address, 1);
816 }
817}
818
819bool Profiler::watchAddress(Address addr){
820 if (m_watch_address_list_ptr->exist(addr))
821 return true;
822 else
823 return false;
824}
825
|
| 826int64 Profiler::getTotalTransactionsExecuted() const {
827 return m_perProcEndTransaction.sum();
828}
829
|
1032// For MemoryControl:
1033void Profiler::profileMemReq(string name, int bank) {
1034// printf("name is %s", name.c_str());
1035 assert(m_memory_control_profilers.count(name) == 1);
1036 m_memory_control_profilers[name] -> m_memReq++;
1037 m_memory_control_profilers[name] -> m_memBankCount[bank]++;
1038}
1039void Profiler::profileMemBankBusy(string name) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memBankBusy++; }
1040void Profiler::profileMemBusBusy(string name) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memBusBusy++; }
1041void Profiler::profileMemReadWriteBusy(string name) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memReadWriteBusy++; }
1042void Profiler::profileMemDataBusBusy(string name) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memDataBusBusy++; }
1043void Profiler::profileMemTfawBusy(string name) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memTfawBusy++; }
1044void Profiler::profileMemRefresh(string name) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memRefresh++; }
1045void Profiler::profileMemRead(string name) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memRead++; }
1046void Profiler::profileMemWrite(string name) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memWrite++; }
1047void Profiler::profileMemWaitCycles(string name, int cycles) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memWaitCycles += cycles; }
1048void Profiler::profileMemInputQ(string name, int cycles) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memInputQ += cycles; }
1049void Profiler::profileMemBankQ(string name, int cycles) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memBankQ += cycles; }
1050void Profiler::profileMemArbWait(string name, int cycles) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memArbWait += cycles; }
1051void Profiler::profileMemRandBusy(string name) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memRandBusy++; }
1052void Profiler::profileMemNotOld(string name) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memNotOld++; }
1053
| 830// For MemoryControl:
831void Profiler::profileMemReq(string name, int bank) {
832// printf("name is %s", name.c_str());
833 assert(m_memory_control_profilers.count(name) == 1);
834 m_memory_control_profilers[name] -> m_memReq++;
835 m_memory_control_profilers[name] -> m_memBankCount[bank]++;
836}
837void Profiler::profileMemBankBusy(string name) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memBankBusy++; }
838void Profiler::profileMemBusBusy(string name) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memBusBusy++; }
839void Profiler::profileMemReadWriteBusy(string name) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memReadWriteBusy++; }
840void Profiler::profileMemDataBusBusy(string name) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memDataBusBusy++; }
841void Profiler::profileMemTfawBusy(string name) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memTfawBusy++; }
842void Profiler::profileMemRefresh(string name) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memRefresh++; }
843void Profiler::profileMemRead(string name) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memRead++; }
844void Profiler::profileMemWrite(string name) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memWrite++; }
845void Profiler::profileMemWaitCycles(string name, int cycles) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memWaitCycles += cycles; }
846void Profiler::profileMemInputQ(string name, int cycles) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memInputQ += cycles; }
847void Profiler::profileMemBankQ(string name, int cycles) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memBankQ += cycles; }
848void Profiler::profileMemArbWait(string name, int cycles) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memArbWait += cycles; }
849void Profiler::profileMemRandBusy(string name) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memRandBusy++; }
850void Profiler::profileMemNotOld(string name) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memNotOld++; }
851
|