1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <numeric>
30
31#include "base/cast.hh"
32#include "base/stl_helpers.hh"
33#include "mem/protocol/MessageSizeType.hh"
34#include "mem/ruby/buffers/MessageBuffer.hh"
35#include "mem/ruby/network/simple/PerfectSwitch.hh"
36#include "mem/ruby/network/simple/SimpleNetwork.hh"
37#include "mem/ruby/network/simple/Switch.hh"
38#include "mem/ruby/network/simple/Throttle.hh"
39
40using namespace std;
41using m5::stl_helpers::deletePointers;
42using m5::stl_helpers::operator<<;
43
44Switch::Switch(const Params *p) : BasicRouter(p)
45{
46 m_perfect_switch = new PerfectSwitch(m_id, this, p->virt_nets);
47 m_msg_counts.resize(MessageSizeType_NUM);
48 m_msg_bytes.resize(MessageSizeType_NUM);
49}
50
51Switch::~Switch()
52{
53 delete m_perfect_switch;
54
55 // Delete throttles (one per output port)
56 deletePointers(m_throttles);
57
58 // Delete MessageBuffers
59 deletePointers(m_buffers_to_free);
60}
61
62void
63Switch::init()
64{
65 BasicRouter::init();
66 m_perfect_switch->init(m_network_ptr);
67}
68
69void
70Switch::addInPort(const vector<MessageBuffer*>& in)
71{
72 m_perfect_switch->addInPort(in);
73
74 for (int i = 0; i < in.size(); i++) {
75 in[i]->setReceiver(this);
76 }
77}
78
79void
80Switch::addOutPort(const vector<MessageBuffer*>& out,
81 const NetDest& routing_table_entry, Cycles link_latency, int bw_multiplier)
82{
83 // Create a throttle
84 Throttle* throttle_ptr = new Throttle(m_id, m_throttles.size(),
85 link_latency, bw_multiplier, m_network_ptr->getEndpointBandwidth(),
86 this);
87 m_throttles.push_back(throttle_ptr);
88
89 // Create one buffer per vnet (these are intermediaryQueues)
90 vector<MessageBuffer*> intermediateBuffers;
91 for (int i = 0; i < out.size(); i++) {
92 out[i]->setSender(this);
93
94 MessageBuffer* buffer_ptr = new MessageBuffer;
95 // Make these queues ordered
96 buffer_ptr->setOrdering(true);
97 if (m_network_ptr->getBufferSize() > 0) {
98 buffer_ptr->resize(m_network_ptr->getBufferSize());
99 }
100
101 intermediateBuffers.push_back(buffer_ptr);
102 m_buffers_to_free.push_back(buffer_ptr);
103
104 buffer_ptr->setSender(this);
105 buffer_ptr->setReceiver(this);
106 }
107
108 // Hook the queues to the PerfectSwitch
109 m_perfect_switch->addOutPort(intermediateBuffers, routing_table_entry);
110
111 // Hook the queues to the Throttle
112 throttle_ptr->addLinks(intermediateBuffers, out);
113}
114
115const Throttle*
116Switch::getThrottle(LinkID link_number) const
117{
118 assert(m_throttles[link_number] != NULL);
119 return m_throttles[link_number];
120}
121
122const vector<Throttle*>*
123Switch::getThrottles() const
124{
125 return &m_throttles;
126}
127
128void
129Switch::regStats()
130{
131 for (int link = 0; link < m_throttles.size(); link++) {
132 m_throttles[link]->regStats(name());
133 }
134
135 m_avg_utilization.name(name() + ".percent_links_utilized");
136 for (unsigned int i = 0; i < m_throttles.size(); i++) {
137 m_avg_utilization += m_throttles[i]->getUtilization();
138 }
139 m_avg_utilization /= Stats::constant(m_throttles.size());
140
141 for (unsigned int type = MessageSizeType_FIRST;
142 type < MessageSizeType_NUM; ++type) {
143 m_msg_counts[type]
144 .name(name() + ".msg_count." +
145 MessageSizeType_to_string(MessageSizeType(type)))
146 .flags(Stats::nozero)
147 ;
148 m_msg_bytes[type]
149 .name(name() + ".msg_bytes." +
150 MessageSizeType_to_string(MessageSizeType(type)))
151 .flags(Stats::nozero)
152 ;
153
154 for (unsigned int i = 0; i < m_throttles.size(); i++) {
155 m_msg_counts[type] += m_throttles[i]->getMsgCount(type);
156 }
157 m_msg_bytes[type] = m_msg_counts[type] * Stats::constant(
158 Network::MessageSizeType_to_int(MessageSizeType(type)));
159 }
160}
161
162void
163Switch::resetStats()
164{
165 m_perfect_switch->clearStats();
166 for (int i = 0; i < m_throttles.size(); i++) {
167 m_throttles[i]->clearStats();
168 }
169}
170
171void
172Switch::collateStats()
173{
174 m_perfect_switch->collateStats();
175 for (int i = 0; i < m_throttles.size(); i++) {
176 m_throttles[i]->collateStats();
177 }
178}
179
180void
181Switch::print(std::ostream& out) const
182{
183 // FIXME printing
184 out << "[Switch]";
185}
186
187bool
188Switch::functionalRead(Packet *pkt)
189{
190 // Access the buffers in the switch for performing a functional read
191 for (unsigned int i = 0; i < m_buffers_to_free.size(); ++i) {
192 if (m_buffers_to_free[i]->functionalRead(pkt)) {
193 return true;
194 }
195 }
196 return false;
197}
198
199uint32_t
200Switch::functionalWrite(Packet *pkt)
201{
202 // Access the buffers in the switch for performing a functional write
203 uint32_t num_functional_writes = 0;
204 for (unsigned int i = 0; i < m_buffers_to_free.size(); ++i) {
205 num_functional_writes += m_buffers_to_free[i]->functionalWrite(pkt);
206 }
207 return num_functional_writes;
208}
209
210Switch *
211SwitchParams::create()
212{
213 return new Switch(this);
214}