SimpleNetwork.cc (8257:7226aebb77b4) SimpleNetwork.cc (8258:7c377f5162f8)
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 22 unchanged lines hidden (view full) ---

31
32#include "base/stl_helpers.hh"
33#include "mem/protocol/MachineType.hh"
34#include "mem/protocol/Protocol.hh"
35#include "mem/protocol/TopologyType.hh"
36#include "mem/ruby/buffers/MessageBuffer.hh"
37#include "mem/ruby/common/NetDest.hh"
38#include "mem/ruby/network/BasicLink.hh"
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 22 unchanged lines hidden (view full) ---

31
32#include "base/stl_helpers.hh"
33#include "mem/protocol/MachineType.hh"
34#include "mem/protocol/Protocol.hh"
35#include "mem/protocol/TopologyType.hh"
36#include "mem/ruby/buffers/MessageBuffer.hh"
37#include "mem/ruby/common/NetDest.hh"
38#include "mem/ruby/network/BasicLink.hh"
39#include "mem/ruby/network/simple/SimpleLink.hh"
39#include "mem/ruby/network/simple/SimpleNetwork.hh"
40#include "mem/ruby/network/simple/Switch.hh"
41#include "mem/ruby/network/simple/Throttle.hh"
42#include "mem/ruby/network/Topology.hh"
43#include "mem/ruby/profiler/Profiler.hh"
44#include "mem/ruby/system/System.hh"
45
46using namespace std;

--- 96 unchanged lines hidden (view full) ---

143 assert(src < m_switch_ptr_vector.size());
144 assert(m_switch_ptr_vector[src] != NULL);
145
146 if (isReconfiguration) {
147 m_switch_ptr_vector[src]->reconfigureOutPort(routing_table_entry);
148 return;
149 }
150
40#include "mem/ruby/network/simple/SimpleNetwork.hh"
41#include "mem/ruby/network/simple/Switch.hh"
42#include "mem/ruby/network/simple/Throttle.hh"
43#include "mem/ruby/network/Topology.hh"
44#include "mem/ruby/profiler/Profiler.hh"
45#include "mem/ruby/system/System.hh"
46
47using namespace std;

--- 96 unchanged lines hidden (view full) ---

144 assert(src < m_switch_ptr_vector.size());
145 assert(m_switch_ptr_vector[src] != NULL);
146
147 if (isReconfiguration) {
148 m_switch_ptr_vector[src]->reconfigureOutPort(routing_table_entry);
149 return;
150 }
151
152 SimpleExtLink *simple_link = safe_cast<SimpleExtLink*>(link);
153
151 m_switch_ptr_vector[src]->addOutPort(m_fromNetQueues[dest],
152 routing_table_entry,
154 m_switch_ptr_vector[src]->addOutPort(m_fromNetQueues[dest],
155 routing_table_entry,
153 link->m_latency,
154 link->m_bw_multiplier);
156 simple_link->m_latency,
157 simple_link->m_bw_multiplier);
155
156 m_endpoint_switches[dest] = m_switch_ptr_vector[src];
157}
158
159// From an endpoint node to a switch
160void
161SimpleNetwork::makeInLink(NodeID src, SwitchID dest, BasicLink* link,
162 LinkDirection direction,

--- 30 unchanged lines hidden (view full) ---

193 if (m_buffer_size > 0) {
194 buffer_ptr->resize(m_buffer_size);
195 }
196 queues.push_back(buffer_ptr);
197 // remember to deallocate it
198 m_buffers_to_free.push_back(buffer_ptr);
199 }
200 // Connect it to the two switches
158
159 m_endpoint_switches[dest] = m_switch_ptr_vector[src];
160}
161
162// From an endpoint node to a switch
163void
164SimpleNetwork::makeInLink(NodeID src, SwitchID dest, BasicLink* link,
165 LinkDirection direction,

--- 30 unchanged lines hidden (view full) ---

196 if (m_buffer_size > 0) {
197 buffer_ptr->resize(m_buffer_size);
198 }
199 queues.push_back(buffer_ptr);
200 // remember to deallocate it
201 m_buffers_to_free.push_back(buffer_ptr);
202 }
203 // Connect it to the two switches
204 SimpleIntLink *simple_link = safe_cast<SimpleIntLink*>(link);
205
201 m_switch_ptr_vector[dest]->addInPort(queues);
202 m_switch_ptr_vector[src]->addOutPort(queues, routing_table_entry,
206 m_switch_ptr_vector[dest]->addInPort(queues);
207 m_switch_ptr_vector[src]->addOutPort(queues, routing_table_entry,
203 link->m_latency,
204 link->m_bw_multiplier);
208 simple_link->m_latency,
209 simple_link->m_bw_multiplier);
205}
206
207void
208SimpleNetwork::checkNetworkAllocation(NodeID id, bool ordered, int network_num)
209{
210 assert(id < m_nodes);
211 assert(network_num < m_virtual_networks);
212

--- 150 unchanged lines hidden --- 		210}
211
212void
213SimpleNetwork::checkNetworkAllocation(NodeID id, bool ordered, int network_num)
214{
215 assert(id < m_nodes);
216 assert(network_num < m_virtual_networks);
217

--- 150 unchanged lines hidden ---