1/* 2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 21 unchanged lines hidden (view full) --- 30#include <numeric> 31 32#include "base/stl_helpers.hh" 33#include "mem/protocol/MachineType.hh" 34#include "mem/protocol/Protocol.hh" 35#include "mem/protocol/TopologyType.hh" 36#include "mem/ruby/buffers/MessageBuffer.hh" 37#include "mem/ruby/common/NetDest.hh" |
38#include "mem/ruby/network/BasicLink.hh" |
39#include "mem/ruby/network/simple/SimpleNetwork.hh" 40#include "mem/ruby/network/simple/Switch.hh" 41#include "mem/ruby/network/simple/Throttle.hh" 42#include "mem/ruby/network/Topology.hh" 43#include "mem/ruby/profiler/Profiler.hh" 44#include "mem/ruby/system/System.hh" 45 46using namespace std; --- 82 unchanged lines hidden (view full) --- 129 } 130 deletePointers(m_switch_ptr_vector); 131 deletePointers(m_buffers_to_free); 132 // delete m_topology_ptr; 133} 134 135// From a switch to an endpoint node 136void |
137SimpleNetwork::makeOutLink(SwitchID src, NodeID dest, BasicLink* link, 138 LinkDirection direction, 139 const NetDest& routing_table_entry, 140 bool isReconfiguration) |
141{ 142 assert(dest < m_nodes); 143 assert(src < m_switch_ptr_vector.size()); 144 assert(m_switch_ptr_vector[src] != NULL); 145 146 if (isReconfiguration) { 147 m_switch_ptr_vector[src]->reconfigureOutPort(routing_table_entry); 148 return; 149 } 150 151 m_switch_ptr_vector[src]->addOutPort(m_fromNetQueues[dest], |
152 routing_table_entry, 153 link->m_latency, 154 link->m_bw_multiplier); 155 |
156 m_endpoint_switches[dest] = m_switch_ptr_vector[src]; 157} 158 159// From an endpoint node to a switch 160void |
161SimpleNetwork::makeInLink(NodeID src, SwitchID dest, BasicLink* link, 162 LinkDirection direction, 163 const NetDest& routing_table_entry, 164 bool isReconfiguration) |
165{ 166 assert(src < m_nodes); 167 if (isReconfiguration) { 168 // do nothing 169 return; 170 } 171 172 m_switch_ptr_vector[dest]->addInPort(m_toNetQueues[src]); 173} 174 175// From a switch to a switch 176void |
177SimpleNetwork::makeInternalLink(SwitchID src, SwitchID dest, BasicLink* link, 178 LinkDirection direction, 179 const NetDest& routing_table_entry, 180 bool isReconfiguration) |
181{ 182 if (isReconfiguration) { 183 m_switch_ptr_vector[src]->reconfigureOutPort(routing_table_entry); 184 return; 185 } 186 187 // Create a set of new MessageBuffers 188 std::vector<MessageBuffer*> queues; --- 6 unchanged lines hidden (view full) --- 195 } 196 queues.push_back(buffer_ptr); 197 // remember to deallocate it 198 m_buffers_to_free.push_back(buffer_ptr); 199 } 200 // Connect it to the two switches 201 m_switch_ptr_vector[dest]->addInPort(queues); 202 m_switch_ptr_vector[src]->addOutPort(queues, routing_table_entry, |
203 link->m_latency, 204 link->m_bw_multiplier); |
205} 206 207void 208SimpleNetwork::checkNetworkAllocation(NodeID id, bool ordered, int network_num) 209{ 210 assert(id < m_nodes); 211 assert(network_num < m_virtual_networks); 212 --- 150 unchanged lines hidden --- |