1/* 2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 24 unchanged lines hidden (view full) --- 33#include "base/stl_helpers.hh" 34#include "mem/ruby/common/NetDest.hh" 35#include "mem/ruby/network/MessageBuffer.hh" 36#include "mem/ruby/network/simple/SimpleLink.hh" 37#include "mem/ruby/network/simple/SimpleNetwork.hh" 38#include "mem/ruby/network/simple/Switch.hh" 39#include "mem/ruby/network/simple/Throttle.hh" 40#include "mem/ruby/profiler/Profiler.hh" |
41 42using namespace std; 43using m5::stl_helpers::deletePointers; 44 45SimpleNetwork::SimpleNetwork(const Params *p) |
46 : Network(p), m_buffer_size(p->buffer_size), 47 m_endpoint_bandwidth(p->endpoint_bandwidth), 48 m_adaptive_routing(p->adaptive_routing) |
49{ |
50 // record the routers 51 for (vector<BasicRouter*>::const_iterator i = p->routers.begin(); 52 i != p->routers.end(); ++i) { 53 Switch* s = safe_cast<Switch*>(*i); 54 m_switches.push_back(s); 55 s->init_net_ptr(this); 56 } 57 --- 28 unchanged lines hidden (view full) --- 86 assert(src < m_switches.size()); 87 assert(m_switches[src] != NULL); 88 89 SimpleExtLink *simple_link = safe_cast<SimpleExtLink*>(link); 90 91 m_switches[src]->addOutPort(m_fromNetQueues[dest], routing_table_entry, 92 simple_link->m_latency, 93 simple_link->m_bw_multiplier); |
94} 95 96// From an endpoint node to a switch 97void 98SimpleNetwork::makeInLink(NodeID src, SwitchID dest, BasicLink* link, 99 LinkDirection direction, 100 const NetDest& routing_table_entry) 101{ --- 113 unchanged lines hidden --- |