SwitchAllocator.hh (11666:10d59d546ea2) | SwitchAllocator.hh (12071:fd0b4bd769dd) |
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1/* 2 * Copyright (c) 2008 Princeton University 3 * Copyright (c) 2016 Georgia Institute of Technology 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 56 unchanged lines hidden (view full) --- 65 return m_input_arbiter_activity; 66 } 67 inline double 68 get_output_arbiter_activity() 69 { 70 return m_output_arbiter_activity; 71 } 72 | 1/* 2 * Copyright (c) 2008 Princeton University 3 * Copyright (c) 2016 Georgia Institute of Technology 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 56 unchanged lines hidden (view full) --- 65 return m_input_arbiter_activity; 66 } 67 inline double 68 get_output_arbiter_activity() 69 { 70 return m_output_arbiter_activity; 71 } 72 |
73 void resetStats(); 74 |
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73 private: 74 int m_num_inports, m_num_outports; 75 int m_num_vcs, m_vc_per_vnet; 76 77 double m_input_arbiter_activity, m_output_arbiter_activity; 78 79 Router *m_router; 80 std::vector<int> m_round_robin_invc; 81 std::vector<int> m_round_robin_inport; 82 std::vector<std::vector<bool>> m_port_requests; 83 std::vector<std::vector<int>> m_vc_winners; // a list for each outport 84 std::vector<InputUnit *> m_input_unit; 85 std::vector<OutputUnit *> m_output_unit; 86}; 87 88#endif // __MEM_RUBY_NETWORK_GARNET_SWITCH_ALLOCATOR_HH__ | 75 private: 76 int m_num_inports, m_num_outports; 77 int m_num_vcs, m_vc_per_vnet; 78 79 double m_input_arbiter_activity, m_output_arbiter_activity; 80 81 Router *m_router; 82 std::vector<int> m_round_robin_invc; 83 std::vector<int> m_round_robin_inport; 84 std::vector<std::vector<bool>> m_port_requests; 85 std::vector<std::vector<int>> m_vc_winners; // a list for each outport 86 std::vector<InputUnit *> m_input_unit; 87 std::vector<OutputUnit *> m_output_unit; 88}; 89 90#endif // __MEM_RUBY_NETWORK_GARNET_SWITCH_ALLOCATOR_HH__ |