1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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32 * all input port has a one-input-one-output switch connected just to
33 * control and bandwidth, since we don't control bandwidth on input
34 * ports. Basically, the class has a vector of nodes and edges. First
35 * 2*m_nodes elements in the node vector are input and output
36 * ports. Edges are represented in two vectors of src and dest
37 * nodes. All edges have latency.
38 */
39
40#ifndef __MEM_RUBY_NETWORK_TOPOLOGY_HH__
41#define __MEM_RUBY_NETWORK_TOPOLOGY_HH__
42
43#include <iostream>
44#include <string>
45#include <vector>
46
47#include "mem/protocol/LinkDirection.hh"
48#include "mem/ruby/common/TypeDefines.hh"
49#include "mem/ruby/network/BasicLink.hh"
50
51class NetDest;
52class Network;
53
54typedef std::vector<std::vector<int> > Matrix;
55
56struct LinkEntry
57{
58 BasicLink *link;
59 LinkDirection direction;
60};
61
62typedef std::map<std::pair<int, int>, LinkEntry> LinkMap;
63
64class Topology
65{
66 public:
67 Topology(uint32_t num_routers, std::vector<BasicExtLink *> ext_links,
68 std::vector<BasicIntLink *> int_links);
69
70 uint32_t numSwitches() const { return m_number_of_switches; }
71 void createLinks(Network *net, bool isReconfiguration);
72 void print(std::ostream& out) const { out << "[Topology]"; }
73
74 protected:
75 void addLink(SwitchID src, SwitchID dest, BasicLink* link,
76 LinkDirection dir);
77 void makeLink(Network *net, SwitchID src, SwitchID dest,
78 const NetDest& routing_table_entry,
79 bool isReconfiguration);
80
81 NodeID m_nodes;
82 uint32_t m_number_of_switches;
83
84 std::vector<BasicExtLink*> m_ext_link_vector;
85 std::vector<BasicIntLink*> m_int_link_vector;
86
87 Matrix m_component_latencies;
88 Matrix m_component_inter_switches;
89
90 LinkMap m_link_map;
91};
92
93inline std::ostream&
94operator<<(std::ostream& out, const Topology& obj)
95{
96 obj.print(out);
97 out << std::flush;
98 return out;
99}
100
101#endif // __MEM_RUBY_NETWORK_TOPOLOGY_HH__