1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <cassert>
30
31#include "base/trace.hh"
32#include "debug/RubyNetwork.hh"
33#include "mem/protocol/MachineType.hh"
34#include "mem/ruby/common/NetDest.hh"
35#include "mem/ruby/network/BasicLink.hh"
36#include "mem/ruby/network/Topology.hh"
37#include "mem/ruby/slicc_interface/AbstractController.hh"
38
39using namespace std;
40
41const int INFINITE_LATENCY = 10000; // Yes, this is a big hack
42
43// Note: In this file, we use the first 2*m_nodes SwitchIDs to
44// represent the input and output endpoint links. These really are
45// not 'switches', as they will not have a Switch object allocated for
46// them. The first m_nodes SwitchIDs are the links into the network,
47// the second m_nodes set of SwitchIDs represent the the output queues
48// of the network.
49
50// Helper functions based on chapter 29 of Cormen et al.
51void extend_shortest_path(Matrix& current_dist, Matrix& latencies,
52 Matrix& inter_switches);
53Matrix shortest_path(const Matrix& weights, Matrix& latencies,
54 Matrix& inter_switches);
55bool link_is_shortest_path_to_node(SwitchID src, SwitchID next,
56 SwitchID final, const Matrix& weights, const Matrix& dist);
57NetDest shortest_path_to_node(SwitchID src, SwitchID next,
58 const Matrix& weights, const Matrix& dist);
59
60Topology::Topology(uint32_t num_routers, vector<BasicExtLink *> ext_links,
61 vector<BasicIntLink *> int_links)
62 : m_number_of_switches(num_routers)
63{
64
65 // initialize component latencies record
66 m_component_latencies.resize(0);
67 m_component_inter_switches.resize(0);
68
69 // Total nodes/controllers in network
70 // Must make sure this is called after the State Machine constructors
71 m_nodes = MachineType_base_number(MachineType_NUM);
72 assert(m_nodes > 1);
73
74 if (m_nodes != ext_links.size()) {
75 fatal("m_nodes (%d) != ext_links vector length (%d)\n",
76 m_nodes, ext_links.size());
77 }
78
79 // analyze both the internal and external links, create data structures
80 // Note that the python created links are bi-directional, but that the
81 // topology and networks utilize uni-directional links. Thus each
82 // BasicLink is converted to two calls to add link, on for each direction
83 for (vector<BasicExtLink*>::const_iterator i = ext_links.begin();
84 i != ext_links.end(); ++i) {
85 BasicExtLink *ext_link = (*i);
86 AbstractController *abs_cntrl = ext_link->params()->ext_node;
87 BasicRouter *router = ext_link->params()->int_node;
88
89 // Store the ExtLink pointers for later
90 m_ext_link_vector.push_back(ext_link);
91
92 int machine_base_idx = MachineType_base_number(
93 string_to_MachineType(abs_cntrl->getName()));
94 int ext_idx1 = machine_base_idx + abs_cntrl->getVersion();
95 int ext_idx2 = ext_idx1 + m_nodes;
96 int int_idx = router->params()->router_id + 2*m_nodes;
97
98 // create the internal uni-directional links in both directions
99 // the first direction is marked: In
100 addLink(ext_idx1, int_idx, ext_link, LinkDirection_In);
101 // the first direction is marked: Out
102 addLink(int_idx, ext_idx2, ext_link, LinkDirection_Out);
103 }
104
105 for (vector<BasicIntLink*>::const_iterator i = int_links.begin();
106 i != int_links.end(); ++i) {
107 BasicIntLink *int_link = (*i);
108 BasicRouter *router_a = int_link->params()->node_a;
109 BasicRouter *router_b = int_link->params()->node_b;
110
111 // Store the IntLink pointers for later
112 m_int_link_vector.push_back(int_link);
113
114 int a = router_a->params()->router_id + 2*m_nodes;
115 int b = router_b->params()->router_id + 2*m_nodes;
116
117 // create the internal uni-directional links in both directions
118 // the first direction is marked: In
119 addLink(a, b, int_link, LinkDirection_In);
120 // the second direction is marked: Out
121 addLink(b, a, int_link, LinkDirection_Out);
122 }
123}
124
125void
126Topology::createLinks(Network *net)
127{
128 // Find maximum switchID
129 SwitchID max_switch_id = 0;
130 for (LinkMap::const_iterator i = m_link_map.begin();
131 i != m_link_map.end(); ++i) {
| 1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <cassert>
30
31#include "base/trace.hh"
32#include "debug/RubyNetwork.hh"
33#include "mem/protocol/MachineType.hh"
34#include "mem/ruby/common/NetDest.hh"
35#include "mem/ruby/network/BasicLink.hh"
36#include "mem/ruby/network/Topology.hh"
37#include "mem/ruby/slicc_interface/AbstractController.hh"
38
39using namespace std;
40
41const int INFINITE_LATENCY = 10000; // Yes, this is a big hack
42
43// Note: In this file, we use the first 2*m_nodes SwitchIDs to
44// represent the input and output endpoint links. These really are
45// not 'switches', as they will not have a Switch object allocated for
46// them. The first m_nodes SwitchIDs are the links into the network,
47// the second m_nodes set of SwitchIDs represent the the output queues
48// of the network.
49
50// Helper functions based on chapter 29 of Cormen et al.
51void extend_shortest_path(Matrix& current_dist, Matrix& latencies,
52 Matrix& inter_switches);
53Matrix shortest_path(const Matrix& weights, Matrix& latencies,
54 Matrix& inter_switches);
55bool link_is_shortest_path_to_node(SwitchID src, SwitchID next,
56 SwitchID final, const Matrix& weights, const Matrix& dist);
57NetDest shortest_path_to_node(SwitchID src, SwitchID next,
58 const Matrix& weights, const Matrix& dist);
59
60Topology::Topology(uint32_t num_routers, vector<BasicExtLink *> ext_links,
61 vector<BasicIntLink *> int_links)
62 : m_number_of_switches(num_routers)
63{
64
65 // initialize component latencies record
66 m_component_latencies.resize(0);
67 m_component_inter_switches.resize(0);
68
69 // Total nodes/controllers in network
70 // Must make sure this is called after the State Machine constructors
71 m_nodes = MachineType_base_number(MachineType_NUM);
72 assert(m_nodes > 1);
73
74 if (m_nodes != ext_links.size()) {
75 fatal("m_nodes (%d) != ext_links vector length (%d)\n",
76 m_nodes, ext_links.size());
77 }
78
79 // analyze both the internal and external links, create data structures
80 // Note that the python created links are bi-directional, but that the
81 // topology and networks utilize uni-directional links. Thus each
82 // BasicLink is converted to two calls to add link, on for each direction
83 for (vector<BasicExtLink*>::const_iterator i = ext_links.begin();
84 i != ext_links.end(); ++i) {
85 BasicExtLink *ext_link = (*i);
86 AbstractController *abs_cntrl = ext_link->params()->ext_node;
87 BasicRouter *router = ext_link->params()->int_node;
88
89 // Store the ExtLink pointers for later
90 m_ext_link_vector.push_back(ext_link);
91
92 int machine_base_idx = MachineType_base_number(
93 string_to_MachineType(abs_cntrl->getName()));
94 int ext_idx1 = machine_base_idx + abs_cntrl->getVersion();
95 int ext_idx2 = ext_idx1 + m_nodes;
96 int int_idx = router->params()->router_id + 2*m_nodes;
97
98 // create the internal uni-directional links in both directions
99 // the first direction is marked: In
100 addLink(ext_idx1, int_idx, ext_link, LinkDirection_In);
101 // the first direction is marked: Out
102 addLink(int_idx, ext_idx2, ext_link, LinkDirection_Out);
103 }
104
105 for (vector<BasicIntLink*>::const_iterator i = int_links.begin();
106 i != int_links.end(); ++i) {
107 BasicIntLink *int_link = (*i);
108 BasicRouter *router_a = int_link->params()->node_a;
109 BasicRouter *router_b = int_link->params()->node_b;
110
111 // Store the IntLink pointers for later
112 m_int_link_vector.push_back(int_link);
113
114 int a = router_a->params()->router_id + 2*m_nodes;
115 int b = router_b->params()->router_id + 2*m_nodes;
116
117 // create the internal uni-directional links in both directions
118 // the first direction is marked: In
119 addLink(a, b, int_link, LinkDirection_In);
120 // the second direction is marked: Out
121 addLink(b, a, int_link, LinkDirection_Out);
122 }
123}
124
125void
126Topology::createLinks(Network *net)
127{
128 // Find maximum switchID
129 SwitchID max_switch_id = 0;
130 for (LinkMap::const_iterator i = m_link_map.begin();
131 i != m_link_map.end(); ++i) {
|
132 std::pair<int, int> src_dest = (*i).first;
| 132 std::pair<SwitchID, SwitchID> src_dest = (*i).first;
|
133 max_switch_id = max(max_switch_id, src_dest.first);
134 max_switch_id = max(max_switch_id, src_dest.second);
135 }
136
137 // Initialize weight, latency, and inter switched vectors
138 Matrix topology_weights;
139 int num_switches = max_switch_id+1;
140 topology_weights.resize(num_switches);
141 m_component_latencies.resize(num_switches);
142 m_component_inter_switches.resize(num_switches);
143
144 for (int i = 0; i < topology_weights.size(); i++) {
145 topology_weights[i].resize(num_switches);
146 m_component_latencies[i].resize(num_switches);
147 m_component_inter_switches[i].resize(num_switches);
148
149 for (int j = 0; j < topology_weights[i].size(); j++) {
150 topology_weights[i][j] = INFINITE_LATENCY;
151
152 // initialize to invalid values
153 m_component_latencies[i][j] = -1;
154
155 // initially assume direct connections / no intermediate
156 // switches between components
157 m_component_inter_switches[i][j] = 0;
158 }
159 }
160
161 // Set identity weights to zero
162 for (int i = 0; i < topology_weights.size(); i++) {
163 topology_weights[i][i] = 0;
164 }
165
166 // Fill in the topology weights and bandwidth multipliers
167 for (LinkMap::const_iterator i = m_link_map.begin();
168 i != m_link_map.end(); ++i) {
169 std::pair<int, int> src_dest = (*i).first;
170 BasicLink* link = (*i).second.link;
171 int src = src_dest.first;
172 int dst = src_dest.second;
173 m_component_latencies[src][dst] = link->m_latency;
174 topology_weights[src][dst] = link->m_weight;
175 }
176
177 // Walk topology and hookup the links
178 Matrix dist = shortest_path(topology_weights, m_component_latencies,
179 m_component_inter_switches);
180 for (int i = 0; i < topology_weights.size(); i++) {
181 for (int j = 0; j < topology_weights[i].size(); j++) {
182 int weight = topology_weights[i][j];
183 if (weight > 0 && weight != INFINITE_LATENCY) {
184 NetDest destination_set =
185 shortest_path_to_node(i, j, topology_weights, dist);
186 makeLink(net, i, j, destination_set);
187 }
188 }
189 }
190}
191
192void
193Topology::addLink(SwitchID src, SwitchID dest, BasicLink* link,
194 LinkDirection dir)
195{
196 assert(src <= m_number_of_switches+m_nodes+m_nodes);
197 assert(dest <= m_number_of_switches+m_nodes+m_nodes);
198
199 std::pair<int, int> src_dest_pair;
200 LinkEntry link_entry;
201
202 src_dest_pair.first = src;
203 src_dest_pair.second = dest;
204 link_entry.direction = dir;
205 link_entry.link = link;
206 m_link_map[src_dest_pair] = link_entry;
207}
208
209void
210Topology::makeLink(Network *net, SwitchID src, SwitchID dest,
211 const NetDest& routing_table_entry)
212{
213 // Make sure we're not trying to connect two end-point nodes
214 // directly together
215 assert(src >= 2 * m_nodes || dest >= 2 * m_nodes);
216
217 std::pair<int, int> src_dest;
218 LinkEntry link_entry;
219
220 if (src < m_nodes) {
221 src_dest.first = src;
222 src_dest.second = dest;
223 link_entry = m_link_map[src_dest];
224 net->makeInLink(src, dest - (2 * m_nodes), link_entry.link,
225 link_entry.direction, routing_table_entry);
226 } else if (dest < 2*m_nodes) {
227 assert(dest >= m_nodes);
228 NodeID node = dest - m_nodes;
229 src_dest.first = src;
230 src_dest.second = dest;
231 link_entry = m_link_map[src_dest];
232 net->makeOutLink(src - (2 * m_nodes), node, link_entry.link,
233 link_entry.direction, routing_table_entry);
234 } else {
235 assert((src >= 2 * m_nodes) && (dest >= 2 * m_nodes));
236 src_dest.first = src;
237 src_dest.second = dest;
238 link_entry = m_link_map[src_dest];
239 net->makeInternalLink(src - (2 * m_nodes), dest - (2 * m_nodes),
240 link_entry.link, link_entry.direction,
241 routing_table_entry);
242 }
243}
244
245// The following all-pairs shortest path algorithm is based on the
246// discussion from Cormen et al., Chapter 26.1.
247void
248extend_shortest_path(Matrix& current_dist, Matrix& latencies,
249 Matrix& inter_switches)
250{
251 bool change = true;
252 int nodes = current_dist.size();
253
254 while (change) {
255 change = false;
256 for (int i = 0; i < nodes; i++) {
257 for (int j = 0; j < nodes; j++) {
258 int minimum = current_dist[i][j];
259 int previous_minimum = minimum;
260 int intermediate_switch = -1;
261 for (int k = 0; k < nodes; k++) {
262 minimum = min(minimum,
263 current_dist[i][k] + current_dist[k][j]);
264 if (previous_minimum != minimum) {
265 intermediate_switch = k;
266 inter_switches[i][j] =
267 inter_switches[i][k] +
268 inter_switches[k][j] + 1;
269 }
270 previous_minimum = minimum;
271 }
272 if (current_dist[i][j] != minimum) {
273 change = true;
274 current_dist[i][j] = minimum;
275 assert(intermediate_switch >= 0);
276 assert(intermediate_switch < latencies[i].size());
277 latencies[i][j] = latencies[i][intermediate_switch] +
278 latencies[intermediate_switch][j];
279 }
280 }
281 }
282 }
283}
284
285Matrix
286shortest_path(const Matrix& weights, Matrix& latencies, Matrix& inter_switches)
287{
288 Matrix dist = weights;
289 extend_shortest_path(dist, latencies, inter_switches);
290 return dist;
291}
292
293bool
294link_is_shortest_path_to_node(SwitchID src, SwitchID next, SwitchID final,
295 const Matrix& weights, const Matrix& dist)
296{
297 return weights[src][next] + dist[next][final] == dist[src][final];
298}
299
300NetDest
301shortest_path_to_node(SwitchID src, SwitchID next, const Matrix& weights,
302 const Matrix& dist)
303{
304 NetDest result;
305 int d = 0;
306 int machines;
307 int max_machines;
308
309 machines = MachineType_NUM;
310 max_machines = MachineType_base_number(MachineType_NUM);
311
312 for (int m = 0; m < machines; m++) {
| 133 max_switch_id = max(max_switch_id, src_dest.first);
134 max_switch_id = max(max_switch_id, src_dest.second);
135 }
136
137 // Initialize weight, latency, and inter switched vectors
138 Matrix topology_weights;
139 int num_switches = max_switch_id+1;
140 topology_weights.resize(num_switches);
141 m_component_latencies.resize(num_switches);
142 m_component_inter_switches.resize(num_switches);
143
144 for (int i = 0; i < topology_weights.size(); i++) {
145 topology_weights[i].resize(num_switches);
146 m_component_latencies[i].resize(num_switches);
147 m_component_inter_switches[i].resize(num_switches);
148
149 for (int j = 0; j < topology_weights[i].size(); j++) {
150 topology_weights[i][j] = INFINITE_LATENCY;
151
152 // initialize to invalid values
153 m_component_latencies[i][j] = -1;
154
155 // initially assume direct connections / no intermediate
156 // switches between components
157 m_component_inter_switches[i][j] = 0;
158 }
159 }
160
161 // Set identity weights to zero
162 for (int i = 0; i < topology_weights.size(); i++) {
163 topology_weights[i][i] = 0;
164 }
165
166 // Fill in the topology weights and bandwidth multipliers
167 for (LinkMap::const_iterator i = m_link_map.begin();
168 i != m_link_map.end(); ++i) {
169 std::pair<int, int> src_dest = (*i).first;
170 BasicLink* link = (*i).second.link;
171 int src = src_dest.first;
172 int dst = src_dest.second;
173 m_component_latencies[src][dst] = link->m_latency;
174 topology_weights[src][dst] = link->m_weight;
175 }
176
177 // Walk topology and hookup the links
178 Matrix dist = shortest_path(topology_weights, m_component_latencies,
179 m_component_inter_switches);
180 for (int i = 0; i < topology_weights.size(); i++) {
181 for (int j = 0; j < topology_weights[i].size(); j++) {
182 int weight = topology_weights[i][j];
183 if (weight > 0 && weight != INFINITE_LATENCY) {
184 NetDest destination_set =
185 shortest_path_to_node(i, j, topology_weights, dist);
186 makeLink(net, i, j, destination_set);
187 }
188 }
189 }
190}
191
192void
193Topology::addLink(SwitchID src, SwitchID dest, BasicLink* link,
194 LinkDirection dir)
195{
196 assert(src <= m_number_of_switches+m_nodes+m_nodes);
197 assert(dest <= m_number_of_switches+m_nodes+m_nodes);
198
199 std::pair<int, int> src_dest_pair;
200 LinkEntry link_entry;
201
202 src_dest_pair.first = src;
203 src_dest_pair.second = dest;
204 link_entry.direction = dir;
205 link_entry.link = link;
206 m_link_map[src_dest_pair] = link_entry;
207}
208
209void
210Topology::makeLink(Network *net, SwitchID src, SwitchID dest,
211 const NetDest& routing_table_entry)
212{
213 // Make sure we're not trying to connect two end-point nodes
214 // directly together
215 assert(src >= 2 * m_nodes || dest >= 2 * m_nodes);
216
217 std::pair<int, int> src_dest;
218 LinkEntry link_entry;
219
220 if (src < m_nodes) {
221 src_dest.first = src;
222 src_dest.second = dest;
223 link_entry = m_link_map[src_dest];
224 net->makeInLink(src, dest - (2 * m_nodes), link_entry.link,
225 link_entry.direction, routing_table_entry);
226 } else if (dest < 2*m_nodes) {
227 assert(dest >= m_nodes);
228 NodeID node = dest - m_nodes;
229 src_dest.first = src;
230 src_dest.second = dest;
231 link_entry = m_link_map[src_dest];
232 net->makeOutLink(src - (2 * m_nodes), node, link_entry.link,
233 link_entry.direction, routing_table_entry);
234 } else {
235 assert((src >= 2 * m_nodes) && (dest >= 2 * m_nodes));
236 src_dest.first = src;
237 src_dest.second = dest;
238 link_entry = m_link_map[src_dest];
239 net->makeInternalLink(src - (2 * m_nodes), dest - (2 * m_nodes),
240 link_entry.link, link_entry.direction,
241 routing_table_entry);
242 }
243}
244
245// The following all-pairs shortest path algorithm is based on the
246// discussion from Cormen et al., Chapter 26.1.
247void
248extend_shortest_path(Matrix& current_dist, Matrix& latencies,
249 Matrix& inter_switches)
250{
251 bool change = true;
252 int nodes = current_dist.size();
253
254 while (change) {
255 change = false;
256 for (int i = 0; i < nodes; i++) {
257 for (int j = 0; j < nodes; j++) {
258 int minimum = current_dist[i][j];
259 int previous_minimum = minimum;
260 int intermediate_switch = -1;
261 for (int k = 0; k < nodes; k++) {
262 minimum = min(minimum,
263 current_dist[i][k] + current_dist[k][j]);
264 if (previous_minimum != minimum) {
265 intermediate_switch = k;
266 inter_switches[i][j] =
267 inter_switches[i][k] +
268 inter_switches[k][j] + 1;
269 }
270 previous_minimum = minimum;
271 }
272 if (current_dist[i][j] != minimum) {
273 change = true;
274 current_dist[i][j] = minimum;
275 assert(intermediate_switch >= 0);
276 assert(intermediate_switch < latencies[i].size());
277 latencies[i][j] = latencies[i][intermediate_switch] +
278 latencies[intermediate_switch][j];
279 }
280 }
281 }
282 }
283}
284
285Matrix
286shortest_path(const Matrix& weights, Matrix& latencies, Matrix& inter_switches)
287{
288 Matrix dist = weights;
289 extend_shortest_path(dist, latencies, inter_switches);
290 return dist;
291}
292
293bool
294link_is_shortest_path_to_node(SwitchID src, SwitchID next, SwitchID final,
295 const Matrix& weights, const Matrix& dist)
296{
297 return weights[src][next] + dist[next][final] == dist[src][final];
298}
299
300NetDest
301shortest_path_to_node(SwitchID src, SwitchID next, const Matrix& weights,
302 const Matrix& dist)
303{
304 NetDest result;
305 int d = 0;
306 int machines;
307 int max_machines;
308
309 machines = MachineType_NUM;
310 max_machines = MachineType_base_number(MachineType_NUM);
311
312 for (int m = 0; m < machines; m++) {
|
313 for (int i = 0; i < MachineType_base_count((MachineType)m); i++) {
| 313 for (NodeID i = 0; i < MachineType_base_count((MachineType)m); i++) {
|
314 // we use "d+max_machines" below since the "destination"
315 // switches for the machines are numbered
316 // [MachineType_base_number(MachineType_NUM)...
317 // 2*MachineType_base_number(MachineType_NUM)-1] for the
318 // component network
319 if (link_is_shortest_path_to_node(src, next, d + max_machines,
320 weights, dist)) {
321 MachineID mach = {(MachineType)m, i};
322 result.add(mach);
323 }
324 d++;
325 }
326 }
327
328 DPRINTF(RubyNetwork, "Returning shortest path\n"
329 "(src-(2*max_machines)): %d, (next-(2*max_machines)): %d, "
330 "src: %d, next: %d, result: %s\n",
331 (src-(2*max_machines)), (next-(2*max_machines)),
332 src, next, result);
333
334 return result;
335}
| 314 // we use "d+max_machines" below since the "destination"
315 // switches for the machines are numbered
316 // [MachineType_base_number(MachineType_NUM)...
317 // 2*MachineType_base_number(MachineType_NUM)-1] for the
318 // component network
319 if (link_is_shortest_path_to_node(src, next, d + max_machines,
320 weights, dist)) {
321 MachineID mach = {(MachineType)m, i};
322 result.add(mach);
323 }
324 d++;
325 }
326 }
327
328 DPRINTF(RubyNetwork, "Returning shortest path\n"
329 "(src-(2*max_machines)): %d, (next-(2*max_machines)): %d, "
330 "src: %d, next: %d, result: %s\n",
331 (src-(2*max_machines)), (next-(2*max_machines)),
332 src, next, result);
333
334 return result;
335}
|