1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <cassert>
30
31#include "base/trace.hh"
32#include "debug/RubyNetwork.hh"
33#include "mem/protocol/MachineType.hh"
34#include "mem/ruby/common/NetDest.hh"
35#include "mem/ruby/network/BasicLink.hh"
36#include "mem/ruby/network/Network.hh"
37#include "mem/ruby/network/Topology.hh"
38#include "mem/ruby/slicc_interface/AbstractController.hh"
39
40using namespace std;
41
42const int INFINITE_LATENCY = 10000; // Yes, this is a big hack
43
44// Note: In this file, we use the first 2*m_nodes SwitchIDs to
45// represent the input and output endpoint links. These really are
46// not 'switches', as they will not have a Switch object allocated for
47// them. The first m_nodes SwitchIDs are the links into the network,
48// the second m_nodes set of SwitchIDs represent the the output queues
49// of the network.
50
51// Helper functions based on chapter 29 of Cormen et al.
52void extend_shortest_path(Matrix& current_dist, Matrix& latencies,
53 Matrix& inter_switches);
54Matrix shortest_path(const Matrix& weights, Matrix& latencies,
55 Matrix& inter_switches);
56bool link_is_shortest_path_to_node(SwitchID src, SwitchID next,
57 SwitchID final, const Matrix& weights, const Matrix& dist);
58NetDest shortest_path_to_node(SwitchID src, SwitchID next,
59 const Matrix& weights, const Matrix& dist);
60
61Topology::Topology(const Params *p)
62 : SimObject(p)
63{
64 m_print_config = p->print_config;
65 m_number_of_switches = p->routers.size();
66
67 // initialize component latencies record
68 m_component_latencies.resize(0);
69 m_component_inter_switches.resize(0);
70
71 // Total nodes/controllers in network
72 // Must make sure this is called after the State Machine constructors
73 m_nodes = MachineType_base_number(MachineType_NUM);
74 assert(m_nodes > 1);
75
76 if (m_nodes != params()->ext_links.size() &&
77 m_nodes != params()->ext_links.size()) {
78 fatal("m_nodes (%d) != ext_links vector length (%d)\n",
79 m_nodes, params()->ext_links.size());
80 }
81
82 // analyze both the internal and external links, create data structures
83 // Note that the python created links are bi-directional, but that the
84 // topology and networks utilize uni-directional links. Thus each
85 // BasicLink is converted to two calls to add link, on for each direction
86 for (vector<BasicExtLink*>::const_iterator i = params()->ext_links.begin();
87 i != params()->ext_links.end(); ++i) {
88 BasicExtLink *ext_link = (*i);
89 AbstractController *abs_cntrl = ext_link->params()->ext_node;
90 BasicRouter *router = ext_link->params()->int_node;
91
| 1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <cassert>
30
31#include "base/trace.hh"
32#include "debug/RubyNetwork.hh"
33#include "mem/protocol/MachineType.hh"
34#include "mem/ruby/common/NetDest.hh"
35#include "mem/ruby/network/BasicLink.hh"
36#include "mem/ruby/network/Network.hh"
37#include "mem/ruby/network/Topology.hh"
38#include "mem/ruby/slicc_interface/AbstractController.hh"
39
40using namespace std;
41
42const int INFINITE_LATENCY = 10000; // Yes, this is a big hack
43
44// Note: In this file, we use the first 2*m_nodes SwitchIDs to
45// represent the input and output endpoint links. These really are
46// not 'switches', as they will not have a Switch object allocated for
47// them. The first m_nodes SwitchIDs are the links into the network,
48// the second m_nodes set of SwitchIDs represent the the output queues
49// of the network.
50
51// Helper functions based on chapter 29 of Cormen et al.
52void extend_shortest_path(Matrix& current_dist, Matrix& latencies,
53 Matrix& inter_switches);
54Matrix shortest_path(const Matrix& weights, Matrix& latencies,
55 Matrix& inter_switches);
56bool link_is_shortest_path_to_node(SwitchID src, SwitchID next,
57 SwitchID final, const Matrix& weights, const Matrix& dist);
58NetDest shortest_path_to_node(SwitchID src, SwitchID next,
59 const Matrix& weights, const Matrix& dist);
60
61Topology::Topology(const Params *p)
62 : SimObject(p)
63{
64 m_print_config = p->print_config;
65 m_number_of_switches = p->routers.size();
66
67 // initialize component latencies record
68 m_component_latencies.resize(0);
69 m_component_inter_switches.resize(0);
70
71 // Total nodes/controllers in network
72 // Must make sure this is called after the State Machine constructors
73 m_nodes = MachineType_base_number(MachineType_NUM);
74 assert(m_nodes > 1);
75
76 if (m_nodes != params()->ext_links.size() &&
77 m_nodes != params()->ext_links.size()) {
78 fatal("m_nodes (%d) != ext_links vector length (%d)\n",
79 m_nodes, params()->ext_links.size());
80 }
81
82 // analyze both the internal and external links, create data structures
83 // Note that the python created links are bi-directional, but that the
84 // topology and networks utilize uni-directional links. Thus each
85 // BasicLink is converted to two calls to add link, on for each direction
86 for (vector<BasicExtLink*>::const_iterator i = params()->ext_links.begin();
87 i != params()->ext_links.end(); ++i) {
88 BasicExtLink *ext_link = (*i);
89 AbstractController *abs_cntrl = ext_link->params()->ext_node;
90 BasicRouter *router = ext_link->params()->int_node;
91
|
92 // Store the controller and ExtLink pointers for later
93 m_controller_vector.push_back(abs_cntrl);
| 92 // Store the ExtLink pointers for later
|
94 m_ext_link_vector.push_back(ext_link);
95
96 int ext_idx1 = abs_cntrl->params()->cntrl_id;
97 int ext_idx2 = ext_idx1 + m_nodes;
98 int int_idx = router->params()->router_id + 2*m_nodes;
99
100 // create the internal uni-directional links in both directions
101 // the first direction is marked: In
102 addLink(ext_idx1, int_idx, ext_link, LinkDirection_In);
103 // the first direction is marked: Out
104 addLink(int_idx, ext_idx2, ext_link, LinkDirection_Out);
105 }
106
107 for (vector<BasicIntLink*>::const_iterator i = params()->int_links.begin();
108 i != params()->int_links.end(); ++i) {
109 BasicIntLink *int_link = (*i);
110 BasicRouter *router_a = int_link->params()->node_a;
111 BasicRouter *router_b = int_link->params()->node_b;
112
113 // Store the IntLink pointers for later
114 m_int_link_vector.push_back(int_link);
115
116 int a = router_a->params()->router_id + 2*m_nodes;
117 int b = router_b->params()->router_id + 2*m_nodes;
118
119 // create the internal uni-directional links in both directions
120 // the first direction is marked: In
121 addLink(a, b, int_link, LinkDirection_In);
122 // the second direction is marked: Out
123 addLink(b, a, int_link, LinkDirection_Out);
124 }
125}
126
127void
128Topology::init()
129{
130}
131
132
133void
134Topology::initNetworkPtr(Network* net_ptr)
135{
136 for (vector<BasicExtLink*>::const_iterator i = params()->ext_links.begin();
137 i != params()->ext_links.end(); ++i) {
138 BasicExtLink *ext_link = (*i);
139 AbstractController *abs_cntrl = ext_link->params()->ext_node;
140 abs_cntrl->initNetworkPtr(net_ptr);
141 }
142}
143
144void
145Topology::createLinks(Network *net, bool isReconfiguration)
146{
147 // Find maximum switchID
148 SwitchID max_switch_id = 0;
149 for (LinkMap::const_iterator i = m_link_map.begin();
150 i != m_link_map.end(); ++i) {
151 std::pair<int, int> src_dest = (*i).first;
152 max_switch_id = max(max_switch_id, src_dest.first);
153 max_switch_id = max(max_switch_id, src_dest.second);
154 }
155
156 // Initialize weight, latency, and inter switched vectors
157 Matrix topology_weights;
158 int num_switches = max_switch_id+1;
159 topology_weights.resize(num_switches);
160 m_component_latencies.resize(num_switches);
161 m_component_inter_switches.resize(num_switches);
162
163 for (int i = 0; i < topology_weights.size(); i++) {
164 topology_weights[i].resize(num_switches);
165 m_component_latencies[i].resize(num_switches);
166 m_component_inter_switches[i].resize(num_switches);
167
168 for (int j = 0; j < topology_weights[i].size(); j++) {
169 topology_weights[i][j] = INFINITE_LATENCY;
170
171 // initialize to invalid values
172 m_component_latencies[i][j] = -1;
173
174 // initially assume direct connections / no intermediate
175 // switches between components
176 m_component_inter_switches[i][j] = 0;
177 }
178 }
179
180 // Set identity weights to zero
181 for (int i = 0; i < topology_weights.size(); i++) {
182 topology_weights[i][i] = 0;
183 }
184
185 // Fill in the topology weights and bandwidth multipliers
186 for (LinkMap::const_iterator i = m_link_map.begin();
187 i != m_link_map.end(); ++i) {
188 std::pair<int, int> src_dest = (*i).first;
189 BasicLink* link = (*i).second.link;
190 int src = src_dest.first;
191 int dst = src_dest.second;
192 m_component_latencies[src][dst] = link->m_latency;
193 topology_weights[src][dst] = link->m_weight;
194 }
195
196 // Walk topology and hookup the links
197 Matrix dist = shortest_path(topology_weights, m_component_latencies,
198 m_component_inter_switches);
199 for (int i = 0; i < topology_weights.size(); i++) {
200 for (int j = 0; j < topology_weights[i].size(); j++) {
201 int weight = topology_weights[i][j];
202 if (weight > 0 && weight != INFINITE_LATENCY) {
203 NetDest destination_set = shortest_path_to_node(i, j,
204 topology_weights, dist);
205 makeLink(net, i, j, destination_set, isReconfiguration);
206 }
207 }
208 }
209}
210
211void
212Topology::addLink(SwitchID src, SwitchID dest, BasicLink* link,
213 LinkDirection dir)
214{
215 assert(src <= m_number_of_switches+m_nodes+m_nodes);
216 assert(dest <= m_number_of_switches+m_nodes+m_nodes);
217
218 std::pair<int, int> src_dest_pair;
219 LinkEntry link_entry;
220
221 src_dest_pair.first = src;
222 src_dest_pair.second = dest;
223 link_entry.direction = dir;
224 link_entry.link = link;
225 m_link_map[src_dest_pair] = link_entry;
226}
227
228void
229Topology::makeLink(Network *net, SwitchID src, SwitchID dest,
230 const NetDest& routing_table_entry, bool isReconfiguration)
231{
232 // Make sure we're not trying to connect two end-point nodes
233 // directly together
234 assert(src >= 2 * m_nodes || dest >= 2 * m_nodes);
235
236 std::pair<int, int> src_dest;
237 LinkEntry link_entry;
238
239 if (src < m_nodes) {
240 src_dest.first = src;
241 src_dest.second = dest;
242 link_entry = m_link_map[src_dest];
243 net->makeInLink(src, dest - (2 * m_nodes), link_entry.link,
244 link_entry.direction,
245 routing_table_entry,
246 isReconfiguration);
247 } else if (dest < 2*m_nodes) {
248 assert(dest >= m_nodes);
249 NodeID node = dest - m_nodes;
250 src_dest.first = src;
251 src_dest.second = dest;
252 link_entry = m_link_map[src_dest];
253 net->makeOutLink(src - (2 * m_nodes), node, link_entry.link,
254 link_entry.direction,
255 routing_table_entry,
256 isReconfiguration);
257 } else {
258 assert((src >= 2 * m_nodes) && (dest >= 2 * m_nodes));
259 src_dest.first = src;
260 src_dest.second = dest;
261 link_entry = m_link_map[src_dest];
262 net->makeInternalLink(src - (2 * m_nodes), dest - (2 * m_nodes),
263 link_entry.link, link_entry.direction,
264 routing_table_entry, isReconfiguration);
265 }
266}
267
| 93 m_ext_link_vector.push_back(ext_link);
94
95 int ext_idx1 = abs_cntrl->params()->cntrl_id;
96 int ext_idx2 = ext_idx1 + m_nodes;
97 int int_idx = router->params()->router_id + 2*m_nodes;
98
99 // create the internal uni-directional links in both directions
100 // the first direction is marked: In
101 addLink(ext_idx1, int_idx, ext_link, LinkDirection_In);
102 // the first direction is marked: Out
103 addLink(int_idx, ext_idx2, ext_link, LinkDirection_Out);
104 }
105
106 for (vector<BasicIntLink*>::const_iterator i = params()->int_links.begin();
107 i != params()->int_links.end(); ++i) {
108 BasicIntLink *int_link = (*i);
109 BasicRouter *router_a = int_link->params()->node_a;
110 BasicRouter *router_b = int_link->params()->node_b;
111
112 // Store the IntLink pointers for later
113 m_int_link_vector.push_back(int_link);
114
115 int a = router_a->params()->router_id + 2*m_nodes;
116 int b = router_b->params()->router_id + 2*m_nodes;
117
118 // create the internal uni-directional links in both directions
119 // the first direction is marked: In
120 addLink(a, b, int_link, LinkDirection_In);
121 // the second direction is marked: Out
122 addLink(b, a, int_link, LinkDirection_Out);
123 }
124}
125
126void
127Topology::init()
128{
129}
130
131
132void
133Topology::initNetworkPtr(Network* net_ptr)
134{
135 for (vector<BasicExtLink*>::const_iterator i = params()->ext_links.begin();
136 i != params()->ext_links.end(); ++i) {
137 BasicExtLink *ext_link = (*i);
138 AbstractController *abs_cntrl = ext_link->params()->ext_node;
139 abs_cntrl->initNetworkPtr(net_ptr);
140 }
141}
142
143void
144Topology::createLinks(Network *net, bool isReconfiguration)
145{
146 // Find maximum switchID
147 SwitchID max_switch_id = 0;
148 for (LinkMap::const_iterator i = m_link_map.begin();
149 i != m_link_map.end(); ++i) {
150 std::pair<int, int> src_dest = (*i).first;
151 max_switch_id = max(max_switch_id, src_dest.first);
152 max_switch_id = max(max_switch_id, src_dest.second);
153 }
154
155 // Initialize weight, latency, and inter switched vectors
156 Matrix topology_weights;
157 int num_switches = max_switch_id+1;
158 topology_weights.resize(num_switches);
159 m_component_latencies.resize(num_switches);
160 m_component_inter_switches.resize(num_switches);
161
162 for (int i = 0; i < topology_weights.size(); i++) {
163 topology_weights[i].resize(num_switches);
164 m_component_latencies[i].resize(num_switches);
165 m_component_inter_switches[i].resize(num_switches);
166
167 for (int j = 0; j < topology_weights[i].size(); j++) {
168 topology_weights[i][j] = INFINITE_LATENCY;
169
170 // initialize to invalid values
171 m_component_latencies[i][j] = -1;
172
173 // initially assume direct connections / no intermediate
174 // switches between components
175 m_component_inter_switches[i][j] = 0;
176 }
177 }
178
179 // Set identity weights to zero
180 for (int i = 0; i < topology_weights.size(); i++) {
181 topology_weights[i][i] = 0;
182 }
183
184 // Fill in the topology weights and bandwidth multipliers
185 for (LinkMap::const_iterator i = m_link_map.begin();
186 i != m_link_map.end(); ++i) {
187 std::pair<int, int> src_dest = (*i).first;
188 BasicLink* link = (*i).second.link;
189 int src = src_dest.first;
190 int dst = src_dest.second;
191 m_component_latencies[src][dst] = link->m_latency;
192 topology_weights[src][dst] = link->m_weight;
193 }
194
195 // Walk topology and hookup the links
196 Matrix dist = shortest_path(topology_weights, m_component_latencies,
197 m_component_inter_switches);
198 for (int i = 0; i < topology_weights.size(); i++) {
199 for (int j = 0; j < topology_weights[i].size(); j++) {
200 int weight = topology_weights[i][j];
201 if (weight > 0 && weight != INFINITE_LATENCY) {
202 NetDest destination_set = shortest_path_to_node(i, j,
203 topology_weights, dist);
204 makeLink(net, i, j, destination_set, isReconfiguration);
205 }
206 }
207 }
208}
209
210void
211Topology::addLink(SwitchID src, SwitchID dest, BasicLink* link,
212 LinkDirection dir)
213{
214 assert(src <= m_number_of_switches+m_nodes+m_nodes);
215 assert(dest <= m_number_of_switches+m_nodes+m_nodes);
216
217 std::pair<int, int> src_dest_pair;
218 LinkEntry link_entry;
219
220 src_dest_pair.first = src;
221 src_dest_pair.second = dest;
222 link_entry.direction = dir;
223 link_entry.link = link;
224 m_link_map[src_dest_pair] = link_entry;
225}
226
227void
228Topology::makeLink(Network *net, SwitchID src, SwitchID dest,
229 const NetDest& routing_table_entry, bool isReconfiguration)
230{
231 // Make sure we're not trying to connect two end-point nodes
232 // directly together
233 assert(src >= 2 * m_nodes || dest >= 2 * m_nodes);
234
235 std::pair<int, int> src_dest;
236 LinkEntry link_entry;
237
238 if (src < m_nodes) {
239 src_dest.first = src;
240 src_dest.second = dest;
241 link_entry = m_link_map[src_dest];
242 net->makeInLink(src, dest - (2 * m_nodes), link_entry.link,
243 link_entry.direction,
244 routing_table_entry,
245 isReconfiguration);
246 } else if (dest < 2*m_nodes) {
247 assert(dest >= m_nodes);
248 NodeID node = dest - m_nodes;
249 src_dest.first = src;
250 src_dest.second = dest;
251 link_entry = m_link_map[src_dest];
252 net->makeOutLink(src - (2 * m_nodes), node, link_entry.link,
253 link_entry.direction,
254 routing_table_entry,
255 isReconfiguration);
256 } else {
257 assert((src >= 2 * m_nodes) && (dest >= 2 * m_nodes));
258 src_dest.first = src;
259 src_dest.second = dest;
260 link_entry = m_link_map[src_dest];
261 net->makeInternalLink(src - (2 * m_nodes), dest - (2 * m_nodes),
262 link_entry.link, link_entry.direction,
263 routing_table_entry, isReconfiguration);
264 }
265}
266
|
268void
269Topology::printStats(std::ostream& out) const
270{
271 for (int cntrl = 0; cntrl < m_controller_vector.size(); cntrl++) {
272 m_controller_vector[cntrl]->printStats(out);
273 }
274}
275
276void
277Topology::clearStats()
278{
279 for (int cntrl = 0; cntrl < m_controller_vector.size(); cntrl++) {
280 m_controller_vector[cntrl]->clearStats();
281 }
282}
283
| |
284// The following all-pairs shortest path algorithm is based on the
285// discussion from Cormen et al., Chapter 26.1.
286void
287extend_shortest_path(Matrix& current_dist, Matrix& latencies,
288 Matrix& inter_switches)
289{
290 bool change = true;
291 int nodes = current_dist.size();
292
293 while (change) {
294 change = false;
295 for (int i = 0; i < nodes; i++) {
296 for (int j = 0; j < nodes; j++) {
297 int minimum = current_dist[i][j];
298 int previous_minimum = minimum;
299 int intermediate_switch = -1;
300 for (int k = 0; k < nodes; k++) {
301 minimum = min(minimum,
302 current_dist[i][k] + current_dist[k][j]);
303 if (previous_minimum != minimum) {
304 intermediate_switch = k;
305 inter_switches[i][j] =
306 inter_switches[i][k] +
307 inter_switches[k][j] + 1;
308 }
309 previous_minimum = minimum;
310 }
311 if (current_dist[i][j] != minimum) {
312 change = true;
313 current_dist[i][j] = minimum;
314 assert(intermediate_switch >= 0);
315 assert(intermediate_switch < latencies[i].size());
316 latencies[i][j] = latencies[i][intermediate_switch] +
317 latencies[intermediate_switch][j];
318 }
319 }
320 }
321 }
322}
323
324Matrix
325shortest_path(const Matrix& weights, Matrix& latencies, Matrix& inter_switches)
326{
327 Matrix dist = weights;
328 extend_shortest_path(dist, latencies, inter_switches);
329 return dist;
330}
331
332bool
333link_is_shortest_path_to_node(SwitchID src, SwitchID next, SwitchID final,
334 const Matrix& weights, const Matrix& dist)
335{
336 return weights[src][next] + dist[next][final] == dist[src][final];
337}
338
339NetDest
340shortest_path_to_node(SwitchID src, SwitchID next, const Matrix& weights,
341 const Matrix& dist)
342{
343 NetDest result;
344 int d = 0;
345 int machines;
346 int max_machines;
347
348 machines = MachineType_NUM;
349 max_machines = MachineType_base_number(MachineType_NUM);
350
351 for (int m = 0; m < machines; m++) {
352 for (int i = 0; i < MachineType_base_count((MachineType)m); i++) {
353 // we use "d+max_machines" below since the "destination"
354 // switches for the machines are numbered
355 // [MachineType_base_number(MachineType_NUM)...
356 // 2*MachineType_base_number(MachineType_NUM)-1] for the
357 // component network
358 if (link_is_shortest_path_to_node(src, next, d + max_machines,
359 weights, dist)) {
360 MachineID mach = {(MachineType)m, i};
361 result.add(mach);
362 }
363 d++;
364 }
365 }
366
367 DPRINTF(RubyNetwork, "Returning shortest path\n"
368 "(src-(2*max_machines)): %d, (next-(2*max_machines)): %d, "
369 "src: %d, next: %d, result: %s\n",
370 (src-(2*max_machines)), (next-(2*max_machines)),
371 src, next, result);
372
373 return result;
374}
375
376Topology *
377TopologyParams::create()
378{
379 return new Topology(this);
380}
381
| 267// The following all-pairs shortest path algorithm is based on the
268// discussion from Cormen et al., Chapter 26.1.
269void
270extend_shortest_path(Matrix& current_dist, Matrix& latencies,
271 Matrix& inter_switches)
272{
273 bool change = true;
274 int nodes = current_dist.size();
275
276 while (change) {
277 change = false;
278 for (int i = 0; i < nodes; i++) {
279 for (int j = 0; j < nodes; j++) {
280 int minimum = current_dist[i][j];
281 int previous_minimum = minimum;
282 int intermediate_switch = -1;
283 for (int k = 0; k < nodes; k++) {
284 minimum = min(minimum,
285 current_dist[i][k] + current_dist[k][j]);
286 if (previous_minimum != minimum) {
287 intermediate_switch = k;
288 inter_switches[i][j] =
289 inter_switches[i][k] +
290 inter_switches[k][j] + 1;
291 }
292 previous_minimum = minimum;
293 }
294 if (current_dist[i][j] != minimum) {
295 change = true;
296 current_dist[i][j] = minimum;
297 assert(intermediate_switch >= 0);
298 assert(intermediate_switch < latencies[i].size());
299 latencies[i][j] = latencies[i][intermediate_switch] +
300 latencies[intermediate_switch][j];
301 }
302 }
303 }
304 }
305}
306
307Matrix
308shortest_path(const Matrix& weights, Matrix& latencies, Matrix& inter_switches)
309{
310 Matrix dist = weights;
311 extend_shortest_path(dist, latencies, inter_switches);
312 return dist;
313}
314
315bool
316link_is_shortest_path_to_node(SwitchID src, SwitchID next, SwitchID final,
317 const Matrix& weights, const Matrix& dist)
318{
319 return weights[src][next] + dist[next][final] == dist[src][final];
320}
321
322NetDest
323shortest_path_to_node(SwitchID src, SwitchID next, const Matrix& weights,
324 const Matrix& dist)
325{
326 NetDest result;
327 int d = 0;
328 int machines;
329 int max_machines;
330
331 machines = MachineType_NUM;
332 max_machines = MachineType_base_number(MachineType_NUM);
333
334 for (int m = 0; m < machines; m++) {
335 for (int i = 0; i < MachineType_base_count((MachineType)m); i++) {
336 // we use "d+max_machines" below since the "destination"
337 // switches for the machines are numbered
338 // [MachineType_base_number(MachineType_NUM)...
339 // 2*MachineType_base_number(MachineType_NUM)-1] for the
340 // component network
341 if (link_is_shortest_path_to_node(src, next, d + max_machines,
342 weights, dist)) {
343 MachineID mach = {(MachineType)m, i};
344 result.add(mach);
345 }
346 d++;
347 }
348 }
349
350 DPRINTF(RubyNetwork, "Returning shortest path\n"
351 "(src-(2*max_machines)): %d, (next-(2*max_machines)): %d, "
352 "src: %d, next: %d, result: %s\n",
353 (src-(2*max_machines)), (next-(2*max_machines)),
354 src, next, result);
355
356 return result;
357}
358
359Topology *
360TopologyParams::create()
361{
362 return new Topology(this);
363}
364
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