1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <cassert>
30
31#include "debug/RubyNetwork.hh"
32#include "mem/protocol/MachineType.hh"
33#include "mem/ruby/common/NetDest.hh"
34#include "mem/ruby/network/BasicLink.hh"
35#include "mem/ruby/network/BasicRouter.hh"
36#include "mem/ruby/network/Network.hh"
37#include "mem/ruby/network/Topology.hh"
38#include "mem/ruby/slicc_interface/AbstractController.hh"
39
40using namespace std;
41
42const int INFINITE_LATENCY = 10000; // Yes, this is a big hack
43
44class BasicRouter;
45
46// Note: In this file, we use the first 2*m_nodes SwitchIDs to
47// represent the input and output endpoint links. These really are
48// not 'switches', as they will not have a Switch object allocated for
49// them. The first m_nodes SwitchIDs are the links into the network,
50// the second m_nodes set of SwitchIDs represent the the output queues
51// of the network.
52
53// Helper functions based on chapter 29 of Cormen et al.
54void extend_shortest_path(Matrix& current_dist, Matrix& latencies,
55 Matrix& inter_switches);
56Matrix shortest_path(const Matrix& weights, Matrix& latencies,
57 Matrix& inter_switches);
58bool link_is_shortest_path_to_node(SwitchID src, SwitchID next,
59 SwitchID final, const Matrix& weights, const Matrix& dist);
60NetDest shortest_path_to_node(SwitchID src, SwitchID next,
61 const Matrix& weights, const Matrix& dist);
62
63Topology::Topology(const Params *p)
64 : SimObject(p)
65{
66 m_print_config = p->print_config;
67 m_number_of_switches = p->routers.size();
68
69 // initialize component latencies record
70 m_component_latencies.resize(0);
71 m_component_inter_switches.resize(0);
72
73 // Total nodes/controllers in network
74 // Must make sure this is called after the State Machine constructors
75 m_nodes = MachineType_base_number(MachineType_NUM);
76 assert(m_nodes > 1);
77
78 if (m_nodes != params()->ext_links.size() &&
79 m_nodes != params()->ext_links.size()) {
80 fatal("m_nodes (%d) != ext_links vector length (%d)\n",
81 m_nodes, params()->ext_links.size());
82 }
83
84 // analyze both the internal and external links, create data structures
85 // Note that the python created links are bi-directional, but that the
86 // topology and networks utilize uni-directional links. Thus each
87 // BasicLink is converted to two calls to add link, on for each direction
88 for (vector<BasicExtLink*>::const_iterator i = params()->ext_links.begin();
89 i != params()->ext_links.end(); ++i) {
90 BasicExtLink *ext_link = (*i);
91 AbstractController *abs_cntrl = ext_link->params()->ext_node;
92 BasicRouter *router = ext_link->params()->int_node;
93
94 // Store the controller and ExtLink pointers for later
95 m_controller_vector.push_back(abs_cntrl);
96 m_ext_link_vector.push_back(ext_link);
97
98 int ext_idx1 = abs_cntrl->params()->cntrl_id;
99 int ext_idx2 = ext_idx1 + m_nodes;
100 int int_idx = router->params()->router_id + 2*m_nodes;
101
102 // create the internal uni-directional links in both directions
103 // the first direction is marked: In
104 addLink(ext_idx1, int_idx, ext_link, LinkDirection_In);
105 // the first direction is marked: Out
106 addLink(int_idx, ext_idx2, ext_link, LinkDirection_Out);
107 }
108
109 for (vector<BasicIntLink*>::const_iterator i = params()->int_links.begin();
110 i != params()->int_links.end(); ++i) {
111 BasicIntLink *int_link = (*i);
112 BasicRouter *router_a = int_link->params()->node_a;
113 BasicRouter *router_b = int_link->params()->node_b;
114
115 // Store the IntLink pointers for later
116 m_int_link_vector.push_back(int_link);
117
118 int a = router_a->params()->router_id + 2*m_nodes;
119 int b = router_b->params()->router_id + 2*m_nodes;
120
121 // create the internal uni-directional links in both directions
122 // the first direction is marked: In
123 addLink(a, b, int_link, LinkDirection_In);
124 // the second direction is marked: Out
125 addLink(b, a, int_link, LinkDirection_Out);
126 }
127}
128
129void
130Topology::init()
131{
132}
133
134
135void
136Topology::initNetworkPtr(Network* net_ptr)
137{
138 for (vector<BasicExtLink*>::const_iterator i = params()->ext_links.begin();
139 i != params()->ext_links.end(); ++i) {
140 BasicExtLink *ext_link = (*i);
141 AbstractController *abs_cntrl = ext_link->params()->ext_node;
142 abs_cntrl->initNetworkPtr(net_ptr);
143 }
144}
145
146void
147Topology::createLinks(Network *net, bool isReconfiguration)
148{
149 // Find maximum switchID
150 SwitchID max_switch_id = 0;
151 for (LinkMap::const_iterator i = m_link_map.begin();
152 i != m_link_map.end(); ++i) {
153 std::pair<int, int> src_dest = (*i).first;
154 max_switch_id = max(max_switch_id, src_dest.first);
155 max_switch_id = max(max_switch_id, src_dest.second);
156 }
157
158 // Initialize weight, latency, and inter switched vectors
159 Matrix topology_weights;
160 int num_switches = max_switch_id+1;
161 topology_weights.resize(num_switches);
162 m_component_latencies.resize(num_switches);
163 m_component_inter_switches.resize(num_switches);
164
165 for (int i = 0; i < topology_weights.size(); i++) {
166 topology_weights[i].resize(num_switches);
167 m_component_latencies[i].resize(num_switches);
168 m_component_inter_switches[i].resize(num_switches);
169
170 for (int j = 0; j < topology_weights[i].size(); j++) {
171 topology_weights[i][j] = INFINITE_LATENCY;
172
173 // initialize to invalid values
174 m_component_latencies[i][j] = -1;
175
176 // initially assume direct connections / no intermediate
177 // switches between components
178 m_component_inter_switches[i][j] = 0;
179 }
180 }
181
182 // Set identity weights to zero
183 for (int i = 0; i < topology_weights.size(); i++) {
184 topology_weights[i][i] = 0;
185 }
186
187 // Fill in the topology weights and bandwidth multipliers
188 for (LinkMap::const_iterator i = m_link_map.begin();
189 i != m_link_map.end(); ++i) {
190 std::pair<int, int> src_dest = (*i).first;
191 BasicLink* link = (*i).second.link;
192 int src = src_dest.first;
193 int dst = src_dest.second;
194 m_component_latencies[src][dst] = link->m_latency;
195 topology_weights[src][dst] = link->m_weight;
196 }
197
198 // Walk topology and hookup the links
199 Matrix dist = shortest_path(topology_weights, m_component_latencies,
200 m_component_inter_switches);
201 for (int i = 0; i < topology_weights.size(); i++) {
202 for (int j = 0; j < topology_weights[i].size(); j++) {
203 int weight = topology_weights[i][j];
204 if (weight > 0 && weight != INFINITE_LATENCY) {
205 NetDest destination_set = shortest_path_to_node(i, j,
206 topology_weights, dist);
207 makeLink(net, i, j, destination_set, isReconfiguration);
208 }
209 }
210 }
211}
212
213void
214Topology::addLink(SwitchID src, SwitchID dest, BasicLink* link,
215 LinkDirection dir)
216{
217 assert(src <= m_number_of_switches+m_nodes+m_nodes);
218 assert(dest <= m_number_of_switches+m_nodes+m_nodes);
219
220 std::pair<int, int> src_dest_pair;
221 LinkEntry link_entry;
222
223 src_dest_pair.first = src;
224 src_dest_pair.second = dest;
225 link_entry.direction = dir;
226 link_entry.link = link;
227 m_link_map[src_dest_pair] = link_entry;
228}
229
230void
231Topology::makeLink(Network *net, SwitchID src, SwitchID dest,
232 const NetDest& routing_table_entry, bool isReconfiguration)
233{
234 // Make sure we're not trying to connect two end-point nodes
235 // directly together
236 assert(src >= 2 * m_nodes || dest >= 2 * m_nodes);
237
238 std::pair<int, int> src_dest;
239 LinkEntry link_entry;
240
241 if (src < m_nodes) {
242 src_dest.first = src;
243 src_dest.second = dest;
244 link_entry = m_link_map[src_dest];
245 net->makeInLink(src, dest - (2 * m_nodes), link_entry.link,
246 link_entry.direction,
247 routing_table_entry,
248 isReconfiguration);
249 } else if (dest < 2*m_nodes) {
250 assert(dest >= m_nodes);
251 NodeID node = dest - m_nodes;
252 src_dest.first = src;
253 src_dest.second = dest;
254 link_entry = m_link_map[src_dest];
255 net->makeOutLink(src - (2 * m_nodes), node, link_entry.link,
256 link_entry.direction,
257 routing_table_entry,
258 isReconfiguration);
259 } else {
260 assert((src >= 2 * m_nodes) && (dest >= 2 * m_nodes));
261 src_dest.first = src;
262 src_dest.second = dest;
263 link_entry = m_link_map[src_dest];
264 net->makeInternalLink(src - (2 * m_nodes), dest - (2 * m_nodes),
265 link_entry.link, link_entry.direction,
266 routing_table_entry, isReconfiguration);
267 }
268}
269
270void
271Topology::printStats(std::ostream& out) const
272{
273 for (int cntrl = 0; cntrl < m_controller_vector.size(); cntrl++) {
274 m_controller_vector[cntrl]->printStats(out);
275 }
276}
277
278void
279Topology::clearStats()
280{
281 for (int cntrl = 0; cntrl < m_controller_vector.size(); cntrl++) {
282 m_controller_vector[cntrl]->clearStats();
283 }
284}
285
286// The following all-pairs shortest path algorithm is based on the
287// discussion from Cormen et al., Chapter 26.1.
288void
289extend_shortest_path(Matrix& current_dist, Matrix& latencies,
290 Matrix& inter_switches)
291{
292 bool change = true;
293 int nodes = current_dist.size();
294
295 while (change) {
296 change = false;
297 for (int i = 0; i < nodes; i++) {
298 for (int j = 0; j < nodes; j++) {
299 int minimum = current_dist[i][j];
300 int previous_minimum = minimum;
301 int intermediate_switch = -1;
302 for (int k = 0; k < nodes; k++) {
303 minimum = min(minimum,
304 current_dist[i][k] + current_dist[k][j]);
305 if (previous_minimum != minimum) {
306 intermediate_switch = k;
307 inter_switches[i][j] =
308 inter_switches[i][k] +
309 inter_switches[k][j] + 1;
310 }
311 previous_minimum = minimum;
312 }
313 if (current_dist[i][j] != minimum) {
314 change = true;
315 current_dist[i][j] = minimum;
316 assert(intermediate_switch >= 0);
317 assert(intermediate_switch < latencies[i].size());
318 latencies[i][j] = latencies[i][intermediate_switch] +
319 latencies[intermediate_switch][j];
320 }
321 }
322 }
323 }
324}
325
326Matrix
327shortest_path(const Matrix& weights, Matrix& latencies, Matrix& inter_switches)
328{
329 Matrix dist = weights;
330 extend_shortest_path(dist, latencies, inter_switches);
331 return dist;
332}
333
334bool
335link_is_shortest_path_to_node(SwitchID src, SwitchID next, SwitchID final,
336 const Matrix& weights, const Matrix& dist)
337{
338 return weights[src][next] + dist[next][final] == dist[src][final];
339}
340
341NetDest
342shortest_path_to_node(SwitchID src, SwitchID next, const Matrix& weights,
343 const Matrix& dist)
344{
345 NetDest result;
346 int d = 0;
347 int machines;
348 int max_machines;
349
350 machines = MachineType_NUM;
351 max_machines = MachineType_base_number(MachineType_NUM);
352
353 for (int m = 0; m < machines; m++) {
354 for (int i = 0; i < MachineType_base_count((MachineType)m); i++) {
355 // we use "d+max_machines" below since the "destination"
356 // switches for the machines are numbered
357 // [MachineType_base_number(MachineType_NUM)...
358 // 2*MachineType_base_number(MachineType_NUM)-1] for the
359 // component network
360 if (link_is_shortest_path_to_node(src, next, d + max_machines,
361 weights, dist)) {
362 MachineID mach = {(MachineType)m, i};
363 result.add(mach);
364 }
365 d++;
366 }
367 }
368
369 DPRINTF(RubyNetwork, "Returning shortest path\n"
370 "(src-(2*max_machines)): %d, (next-(2*max_machines)): %d, "
371 "src: %d, next: %d, result: %s\n",
372 (src-(2*max_machines)), (next-(2*max_machines)),
373 src, next, result);
374
375 return result;
376}
377
378Topology *
379TopologyParams::create()
380{
381 return new Topology(this);
382}
383