1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <cassert>
30
31#include "debug/RubyNetwork.hh"
32#include "mem/protocol/MachineType.hh"
33#include "mem/protocol/Protocol.hh"
34#include "mem/protocol/TopologyType.hh"
35#include "mem/ruby/common/NetDest.hh"
36#include "mem/ruby/network/Network.hh"
37#include "mem/ruby/network/Topology.hh"
38#include "mem/ruby/slicc_interface/AbstractController.hh"
39#include "mem/ruby/system/System.hh"
40
41using namespace std;
42
43const int INFINITE_LATENCY = 10000; // Yes, this is a big hack
44const int DEFAULT_BW_MULTIPLIER = 1; // Just to be consistent with above :)
45
46// Note: In this file, we use the first 2*m_nodes SwitchIDs to
47// represent the input and output endpoint links. These really are
48// not 'switches', as they will not have a Switch object allocated for
49// them. The first m_nodes SwitchIDs are the links into the network,
50// the second m_nodes set of SwitchIDs represent the the output queues
51// of the network.
52
53// Helper functions based on chapter 29 of Cormen et al.
54void extend_shortest_path(Matrix& current_dist, Matrix& latencies,
55 Matrix& inter_switches);
56Matrix shortest_path(const Matrix& weights, Matrix& latencies,
57 Matrix& inter_switches);
58bool link_is_shortest_path_to_node(SwitchID src, SwitchID next,
59 SwitchID final, const Matrix& weights, const Matrix& dist);
60NetDest shortest_path_to_node(SwitchID src, SwitchID next,
61 const Matrix& weights, const Matrix& dist);
62
63Topology::Topology(const Params *p)
64 : SimObject(p)
65{
66 m_print_config = p->print_config;
67 m_number_of_switches = p->num_int_nodes;
68 // initialize component latencies record
69 m_component_latencies.resize(0);
70 m_component_inter_switches.resize(0);
71
72 // Total nodes/controllers in network
73 // Must make sure this is called after the State Machine constructors
74 m_nodes = MachineType_base_number(MachineType_NUM);
75 assert(m_nodes > 1);
76
77 if (m_nodes != params()->ext_links.size() &&
78 m_nodes != params()->ext_links.size()) {
79 fatal("m_nodes (%d) != ext_links vector length (%d)\n",
80 m_nodes != params()->ext_links.size());
81 }
82
83 // First create the links between the endpoints (i.e. controllers)
84 // and the network.
85 for (vector<ExtLink*>::const_iterator i = params()->ext_links.begin();
86 i != params()->ext_links.end(); ++i) {
87 const ExtLinkParams *p = (*i)->params();
88 AbstractController *c = p->ext_node;
89
90 // Store the controller pointers for later
91 m_controller_vector.push_back(c);
92
93 int ext_idx1 =
94 MachineType_base_number(c->getMachineType()) + c->getVersion();
95 int ext_idx2 = ext_idx1 + m_nodes;
96 int int_idx = p->int_node + 2*m_nodes;
97
98 // create the links in both directions
99 addLink(ext_idx1, int_idx, p->latency, p->bw_multiplier, p->weight);
100 addLink(int_idx, ext_idx2, p->latency, p->bw_multiplier, p->weight);
101 }
102
103 for (vector::const_iterator i = params()->int_links.begin();
104 i != params()->int_links.end(); ++i) {
105 const IntLinkParams *p = (*i)->params();
106 int a = p->node_a + 2*m_nodes;
107 int b = p->node_b + 2*m_nodes;
108
109 // create the links in both directions
110 addLink(a, b, p->latency, p->bw_multiplier, p->weight);
111 addLink(b, a, p->latency, p->bw_multiplier, p->weight);
112 }
113}
114
115
116void
117Topology::initNetworkPtr(Network* net_ptr)
118{
119 for (int cntrl = 0; cntrl < m_controller_vector.size(); cntrl++) {
120 m_controller_vector[cntrl]->initNetworkPtr(net_ptr);
121 }
122}
123
124void
125Topology::createLinks(Network *net, bool isReconfiguration)
126{
127 // Find maximum switchID
128 SwitchID max_switch_id = 0;
129 for (int i = 0; i < m_links_src_vector.size(); i++) {
130 max_switch_id = max(max_switch_id, m_links_src_vector[i]);
131 max_switch_id = max(max_switch_id, m_links_dest_vector[i]);
132 }
133
134 // Initialize weight vector
135 Matrix topology_weights;
136 Matrix topology_latency;
137 Matrix topology_bw_multis;
138 int num_switches = max_switch_id+1;
139 topology_weights.resize(num_switches);
140 topology_latency.resize(num_switches);
141 topology_bw_multis.resize(num_switches);
142
143 // FIXME setting the size of a member variable here is a HACK!
144 m_component_latencies.resize(num_switches);
145
146 // FIXME setting the size of a member variable here is a HACK!
147 m_component_inter_switches.resize(num_switches);
148
149 for (int i = 0; i < topology_weights.size(); i++) {
150 topology_weights[i].resize(num_switches);
151 topology_latency[i].resize(num_switches);
152 topology_bw_multis[i].resize(num_switches);
153 m_component_latencies[i].resize(num_switches);
154
155 // FIXME setting the size of a member variable here is a HACK!
156 m_component_inter_switches[i].resize(num_switches);
157
158 for (int j = 0; j < topology_weights[i].size(); j++) {
159 topology_weights[i][j] = INFINITE_LATENCY;
160
161 // initialize to invalid values
162 topology_latency[i][j] = -1;
163 topology_bw_multis[i][j] = -1;
164 m_component_latencies[i][j] = -1;
165
166 // initially assume direct connections / no intermediate
167 // switches between components
168 m_component_inter_switches[i][j] = 0;
169 }
170 }
171
172 // Set identity weights to zero
173 for (int i = 0; i < topology_weights.size(); i++) {
174 topology_weights[i][i] = 0;
175 }
176
177 // Fill in the topology weights and bandwidth multipliers
178 for (int i = 0; i < m_links_src_vector.size(); i++) {
179 int src = m_links_src_vector[i];
180 int dst = m_links_dest_vector[i];
181 topology_weights[src][dst] = m_links_weight_vector[i];
182 topology_latency[src][dst] = m_links_latency_vector[i];
183 m_component_latencies[src][dst] = m_links_latency_vector[i];
184 topology_bw_multis[src][dst] = m_bw_multiplier_vector[i];
185 }
186
187 // Walk topology and hookup the links
188 Matrix dist = shortest_path(topology_weights, m_component_latencies,
189 m_component_inter_switches);
190 for (int i = 0; i < topology_weights.size(); i++) {
191 for (int j = 0; j < topology_weights[i].size(); j++) {
192 int weight = topology_weights[i][j];
193 int bw_multiplier = topology_bw_multis[i][j];
194 int latency = topology_latency[i][j];
195 if (weight > 0 && weight != INFINITE_LATENCY) {
196 NetDest destination_set = shortest_path_to_node(i, j,
197 topology_weights, dist);
198 assert(latency != -1);
199 makeLink(net, i, j, destination_set, latency, weight,
200 bw_multiplier, isReconfiguration);
201 }
202 }
203 }
204}
205
206SwitchID
207Topology::newSwitchID()
208{
209 m_number_of_switches++;
210 return m_number_of_switches-1+m_nodes+m_nodes;
211}
212
213void
214Topology::addLink(SwitchID src, SwitchID dest, int link_latency)
215{
216 addLink(src, dest, link_latency, DEFAULT_BW_MULTIPLIER, link_latency);
217}
218
219void
220Topology::addLink(SwitchID src, SwitchID dest, int link_latency,
221 int bw_multiplier)
222{
223 addLink(src, dest, link_latency, bw_multiplier, link_latency);
224}
225
226void
227Topology::addLink(SwitchID src, SwitchID dest, int link_latency,
228 int bw_multiplier, int link_weight)
229{
230 assert(src <= m_number_of_switches+m_nodes+m_nodes);
231 assert(dest <= m_number_of_switches+m_nodes+m_nodes);
232 m_links_src_vector.push_back(src);
233 m_links_dest_vector.push_back(dest);
234 m_links_latency_vector.push_back(link_latency);
235 m_links_weight_vector.push_back(link_weight);
236 m_bw_multiplier_vector.push_back(bw_multiplier);
237}
238
239void
240Topology::makeLink(Network *net, SwitchID src, SwitchID dest,
241 const NetDest& routing_table_entry, int link_latency, int link_weight,
242 int bw_multiplier, bool isReconfiguration)
243{
244 // Make sure we're not trying to connect two end-point nodes
245 // directly together
246 assert(src >= 2 * m_nodes || dest >= 2 * m_nodes);
247
248 if (src < m_nodes) {
249 net->makeInLink(src, dest-(2*m_nodes), routing_table_entry,
250 link_latency, bw_multiplier, isReconfiguration);
251 } else if (dest < 2*m_nodes) {
252 assert(dest >= m_nodes);
253 NodeID node = dest-m_nodes;
254 net->makeOutLink(src-(2*m_nodes), node, routing_table_entry,
255 link_latency, link_weight, bw_multiplier, isReconfiguration);
256 } else {
257 assert((src >= 2*m_nodes) && (dest >= 2*m_nodes));
258 net->makeInternalLink(src-(2*m_nodes), dest-(2*m_nodes),
259 routing_table_entry, link_latency, link_weight, bw_multiplier,
260 isReconfiguration);
261 }
262}
263
264void
265Topology::printStats(std::ostream& out) const
266{
267 for (int cntrl = 0; cntrl < m_controller_vector.size(); cntrl++) {
268 m_controller_vector[cntrl]->printStats(out);
269 }
270}
271
272void
273Topology::clearStats()
274{
275 for (int cntrl = 0; cntrl < m_controller_vector.size(); cntrl++) {
276 m_controller_vector[cntrl]->clearStats();
277 }
278}
279
280void
281Topology::printConfig(std::ostream& out) const
282{
283 if (m_print_config == false)
284 return;
285
286 assert(m_component_latencies.size() > 0);
287
288 out << "--- Begin Topology Print ---" << endl
289 << endl
290 << "Topology print ONLY indicates the _NETWORK_ latency between two "
291 << "machines" << endl
292 << "It does NOT include the latency within the machines" << endl
293 << endl;
294
295 for (int m = 0; m < MachineType_NUM; m++) {
296 int i_end = MachineType_base_count((MachineType)m);
297 for (int i = 0; i < i_end; i++) {
298 MachineID cur_mach = {(MachineType)m, i};
299 out << cur_mach << " Network Latencies" << endl;
300 for (int n = 0; n < MachineType_NUM; n++) {
301 int j_end = MachineType_base_count((MachineType)n);
302 for (int j = 0; j < j_end; j++) {
303 MachineID dest_mach = {(MachineType)n, j};
304 if (cur_mach == dest_mach)
305 continue;
306
307 int src = MachineType_base_number((MachineType)m) + i;
308 int dst = MachineType_base_number(MachineType_NUM) +
309 MachineType_base_number((MachineType)n) + j;
310 int link_latency = m_component_latencies[src][dst];
311 int intermediate_switches =
312 m_component_inter_switches[src][dst];
313
314 // NOTE switches are assumed to have single
315 // cycle latency
316 out << " " << cur_mach << " -> " << dest_mach
317 << " net_lat: "
318 << link_latency + intermediate_switches << endl;
319 }
320 }
321 out << endl;
322 }
323 }
324
325 out << "--- End Topology Print ---" << endl;
326}
327
328// The following all-pairs shortest path algorithm is based on the
329// discussion from Cormen et al., Chapter 26.1.
330void
331extend_shortest_path(Matrix& current_dist, Matrix& latencies,
332 Matrix& inter_switches)
333{
334 bool change = true;
335 int nodes = current_dist.size();
336
337 while (change) {
338 change = false;
339 for (int i = 0; i < nodes; i++) {
340 for (int j = 0; j < nodes; j++) {
341 int minimum = current_dist[i][j];
342 int previous_minimum = minimum;
343 int intermediate_switch = -1;
344 for (int k = 0; k < nodes; k++) {
345 minimum = min(minimum,
346 current_dist[i][k] + current_dist[k][j]);
347 if (previous_minimum != minimum) {
348 intermediate_switch = k;
349 inter_switches[i][j] =
350 inter_switches[i][k] +
351 inter_switches[k][j] + 1;
352 }
353 previous_minimum = minimum;
354 }
355 if (current_dist[i][j] != minimum) {
356 change = true;
357 current_dist[i][j] = minimum;
358 assert(intermediate_switch >= 0);
359 assert(intermediate_switch < latencies[i].size());
360 latencies[i][j] = latencies[i][intermediate_switch] +
361 latencies[intermediate_switch][j];
362 }
363 }
364 }
365 }
366}
367
368Matrix
369shortest_path(const Matrix& weights, Matrix& latencies, Matrix& inter_switches)
370{
371 Matrix dist = weights;
372 extend_shortest_path(dist, latencies, inter_switches);
373 return dist;
374}
375
376bool
377link_is_shortest_path_to_node(SwitchID src, SwitchID next, SwitchID final,
378 const Matrix& weights, const Matrix& dist)
379{
380 return weights[src][next] + dist[next][final] == dist[src][final];
381}
382
383NetDest
384shortest_path_to_node(SwitchID src, SwitchID next, const Matrix& weights,
385 const Matrix& dist)
386{
387 NetDest result;
388 int d = 0;
389 int machines;
390 int max_machines;
391
392 machines = MachineType_NUM;
393 max_machines = MachineType_base_number(MachineType_NUM);
394
395 for (int m = 0; m < machines; m++) {
396 for (int i = 0; i < MachineType_base_count((MachineType)m); i++) {
397 // we use "d+max_machines" below since the "destination"
398 // switches for the machines are numbered
399 // [MachineType_base_number(MachineType_NUM)...
400 // 2*MachineType_base_number(MachineType_NUM)-1] for the
401 // component network
402 if (link_is_shortest_path_to_node(src, next, d + max_machines,
403 weights, dist)) {
404 MachineID mach = {(MachineType)m, i};
405 result.add(mach);
406 }
407 d++;
408 }
409 }
410
411 DPRINTF(RubyNetwork, "Returning shortest path\n"
412 "(src-(2*max_machines)): %d, (next-(2*max_machines)): %d, "
413 "src: %d, next: %d, result: %s\n",
414 (src-(2*max_machines)), (next-(2*max_machines)),
415 src, next, result);
416
417 return result;
418}
419
420Topology *
421TopologyParams::create()
422{
423 return new Topology(this);
424}
425
426Link *
427LinkParams::create()
428{
429 return new Link(this);
430}
431
432ExtLink *
433ExtLinkParams::create()
434{
435 return new ExtLink(this);
436}
437
438IntLink *
439IntLinkParams::create()
440{
441 return new IntLink(this);
442}