| Network.hh (6154:6bb54dcb940e) | Network.hh (6284:a63d1dc4c820) |
|---|---|
| 1 2/* 3 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 14 unchanged lines hidden (view full) --- 23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30/* | 1 2/* 3 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 14 unchanged lines hidden (view full) --- 23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30/* |
| 31 * Network.h | 31 * Network.hh |
| 32 * 33 * Description: The Network class is the base class for classes that 34 * implement the interconnection network between components 35 * (processor/cache components and memory/directory components). The 36 * interconnection network as described here is not a physical 37 * network, but a programming concept used to implement all 38 * communication between components. Thus parts of this 'network' 39 * will model the on-chip connections between cache controllers and --- 109 unchanged lines hidden --- | 32 * 33 * Description: The Network class is the base class for classes that 34 * implement the interconnection network between components 35 * (processor/cache components and memory/directory components). The 36 * interconnection network as described here is not a physical 37 * network, but a programming concept used to implement all 38 * communication between components. Thus parts of this 'network' 39 * will model the on-chip connections between cache controllers and --- 109 unchanged lines hidden --- |