1/*
| 1/*
|
2 * Copyright (c) 2011-2012 ARM Limited
| 2 * Copyright (c) 2011-2013 ARM Limited
|
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Andreas Hansson
38 */
39
40/**
41 * @file
42 * PortProxy Object Declaration.
43 *
44 * Port proxies are used when non-structural entities need access to
45 * the memory system (or structural entities that want to peak into
46 * the memory system without making a real memory access).
47 *
48 * Proxy objects replace the previous FunctionalPort, TranslatingPort
49 * and VirtualPort objects, which provided the same functionality as
50 * the proxies, but were instances of ports not corresponding to real
51 * structural ports of the simulated system. Via the port proxies all
52 * the accesses go through an actual port (either the system port,
53 * e.g. for processes or initialisation, or a the data port of the
54 * CPU, e.g. for threads) and thus are transparent to a potentially
55 * distributed memory and automatically adhere to the memory map of
56 * the system.
57 */
58
59#ifndef __MEM_PORT_PROXY_HH__
60#define __MEM_PORT_PROXY_HH__
61
62#include "config/the_isa.hh"
63#if THE_ISA != NO_ISA
64 #include "arch/isa_traits.hh"
65#endif
66
67#include "mem/port.hh"
68#include "sim/byteswap.hh"
69
70/**
71 * This object is a proxy for a structural port, to be used for debug
72 * accesses.
73 *
74 * This proxy object is used when non structural entities
75 * (e.g. thread contexts, object file loaders) need access to the
76 * memory system. It calls the corresponding functions on the underlying
77 * structural port, and provides templatized convenience access functions.
78 *
79 * The addresses are interpreted as physical addresses.
80 *
81 * @sa SETranslatingProxy
82 * @sa FSTranslatingProxy
83 */
84class PortProxy
85{
86 private:
87
88 /** The actual physical port used by this proxy. */
89 MasterPort &_port;
90
| 3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Andreas Hansson
38 */
39
40/**
41 * @file
42 * PortProxy Object Declaration.
43 *
44 * Port proxies are used when non-structural entities need access to
45 * the memory system (or structural entities that want to peak into
46 * the memory system without making a real memory access).
47 *
48 * Proxy objects replace the previous FunctionalPort, TranslatingPort
49 * and VirtualPort objects, which provided the same functionality as
50 * the proxies, but were instances of ports not corresponding to real
51 * structural ports of the simulated system. Via the port proxies all
52 * the accesses go through an actual port (either the system port,
53 * e.g. for processes or initialisation, or a the data port of the
54 * CPU, e.g. for threads) and thus are transparent to a potentially
55 * distributed memory and automatically adhere to the memory map of
56 * the system.
57 */
58
59#ifndef __MEM_PORT_PROXY_HH__
60#define __MEM_PORT_PROXY_HH__
61
62#include "config/the_isa.hh"
63#if THE_ISA != NO_ISA
64 #include "arch/isa_traits.hh"
65#endif
66
67#include "mem/port.hh"
68#include "sim/byteswap.hh"
69
70/**
71 * This object is a proxy for a structural port, to be used for debug
72 * accesses.
73 *
74 * This proxy object is used when non structural entities
75 * (e.g. thread contexts, object file loaders) need access to the
76 * memory system. It calls the corresponding functions on the underlying
77 * structural port, and provides templatized convenience access functions.
78 *
79 * The addresses are interpreted as physical addresses.
80 *
81 * @sa SETranslatingProxy
82 * @sa FSTranslatingProxy
83 */
84class PortProxy
85{
86 private:
87
88 /** The actual physical port used by this proxy. */
89 MasterPort &_port;
90
|
| 91 /** Granularity of any transactions issued through this proxy. */
92 const unsigned int _cacheLineSize;
93
|
91 void blobHelper(Addr addr, uint8_t *p, int size, MemCmd cmd) const;
92
93 public:
| 94 void blobHelper(Addr addr, uint8_t *p, int size, MemCmd cmd) const;
95
96 public:
|
94 PortProxy(MasterPort &port) : _port(port) { }
| 97 PortProxy(MasterPort &port, unsigned int cacheLineSize) :
98 _port(port), _cacheLineSize(cacheLineSize) { }
|
95 virtual ~PortProxy() { }
96
97 /**
98 * Read size bytes memory at address and store in p.
99 */
100 virtual void readBlob(Addr addr, uint8_t* p, int size) const
101 { blobHelper(addr, p, size, MemCmd::ReadReq); }
102
103 /**
104 * Write size bytes from p to address.
105 */
106 virtual void writeBlob(Addr addr, uint8_t* p, int size) const
107 { blobHelper(addr, p, size, MemCmd::WriteReq); }
108
109 /**
110 * Fill size bytes starting at addr with byte value val.
111 */
112 virtual void memsetBlob(Addr addr, uint8_t v, int size) const;
113
114 /**
115 * Read sizeof(T) bytes from address and return as object T.
116 */
117 template <typename T>
118 T read(Addr address) const;
119
120 /**
121 * Write object T to address. Writes sizeof(T) bytes.
122 */
123 template <typename T>
124 void write(Addr address, T data) const;
125
126#if THE_ISA != NO_ISA
127 /**
128 * Read sizeof(T) bytes from address and return as object T.
129 * Performs Guest to Host endianness transform.
130 */
131 template <typename T>
132 T readGtoH(Addr address) const;
133
134 /**
135 * Write object T to address. Writes sizeof(T) bytes.
136 * Performs Host to Guest endianness transform.
137 */
138 template <typename T>
139 void writeHtoG(Addr address, T data) const;
140#endif
141};
142
143
144template <typename T>
145T
146PortProxy::read(Addr address) const
147{
148 T data;
149 readBlob(address, (uint8_t*)&data, sizeof(T));
150 return data;
151}
152
153template <typename T>
154void
155PortProxy::write(Addr address, T data) const
156{
157 writeBlob(address, (uint8_t*)&data, sizeof(T));
158}
159
160#if THE_ISA != NO_ISA
161template <typename T>
162T
163PortProxy::readGtoH(Addr address) const
164{
165 T data;
166 readBlob(address, (uint8_t*)&data, sizeof(T));
167 return TheISA::gtoh(data);
168}
169
170template <typename T>
171void
172PortProxy::writeHtoG(Addr address, T data) const
173{
174 data = TheISA::htog(data);
175 writeBlob(address, (uint8_t*)&data, sizeof(T));
176}
177#endif
178
179#endif // __MEM_PORT_PROXY_HH__
| 99 virtual ~PortProxy() { }
100
101 /**
102 * Read size bytes memory at address and store in p.
103 */
104 virtual void readBlob(Addr addr, uint8_t* p, int size) const
105 { blobHelper(addr, p, size, MemCmd::ReadReq); }
106
107 /**
108 * Write size bytes from p to address.
109 */
110 virtual void writeBlob(Addr addr, uint8_t* p, int size) const
111 { blobHelper(addr, p, size, MemCmd::WriteReq); }
112
113 /**
114 * Fill size bytes starting at addr with byte value val.
115 */
116 virtual void memsetBlob(Addr addr, uint8_t v, int size) const;
117
118 /**
119 * Read sizeof(T) bytes from address and return as object T.
120 */
121 template <typename T>
122 T read(Addr address) const;
123
124 /**
125 * Write object T to address. Writes sizeof(T) bytes.
126 */
127 template <typename T>
128 void write(Addr address, T data) const;
129
130#if THE_ISA != NO_ISA
131 /**
132 * Read sizeof(T) bytes from address and return as object T.
133 * Performs Guest to Host endianness transform.
134 */
135 template <typename T>
136 T readGtoH(Addr address) const;
137
138 /**
139 * Write object T to address. Writes sizeof(T) bytes.
140 * Performs Host to Guest endianness transform.
141 */
142 template <typename T>
143 void writeHtoG(Addr address, T data) const;
144#endif
145};
146
147
148template <typename T>
149T
150PortProxy::read(Addr address) const
151{
152 T data;
153 readBlob(address, (uint8_t*)&data, sizeof(T));
154 return data;
155}
156
157template <typename T>
158void
159PortProxy::write(Addr address, T data) const
160{
161 writeBlob(address, (uint8_t*)&data, sizeof(T));
162}
163
164#if THE_ISA != NO_ISA
165template <typename T>
166T
167PortProxy::readGtoH(Addr address) const
168{
169 T data;
170 readBlob(address, (uint8_t*)&data, sizeof(T));
171 return TheISA::gtoh(data);
172}
173
174template <typename T>
175void
176PortProxy::writeHtoG(Addr address, T data) const
177{
178 data = TheISA::htog(data);
179 writeBlob(address, (uint8_t*)&data, sizeof(T));
180}
181#endif
182
183#endif // __MEM_PORT_PROXY_HH__
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