1/*
2 * Copyright (c) 2011-2013, 2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Andreas Hansson
38 */
39
40/**
41 * @file
42 * PortProxy Object Declaration.
43 *
44 * Port proxies are used when non-structural entities need access to
45 * the memory system (or structural entities that want to peak into
46 * the memory system without making a real memory access).
47 *
48 * Proxy objects replace the previous FunctionalPort, TranslatingPort
49 * and VirtualPort objects, which provided the same functionality as
50 * the proxies, but were instances of ports not corresponding to real
51 * structural ports of the simulated system. Via the port proxies all
52 * the accesses go through an actual port (either the system port,
53 * e.g. for processes or initialisation, or a the data port of the
54 * CPU, e.g. for threads) and thus are transparent to a potentially
55 * distributed memory and automatically adhere to the memory map of
56 * the system.
57 */
58
59#ifndef __MEM_PORT_PROXY_HH__
60#define __MEM_PORT_PROXY_HH__
61
| 1/*
2 * Copyright (c) 2011-2013, 2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Andreas Hansson
38 */
39
40/**
41 * @file
42 * PortProxy Object Declaration.
43 *
44 * Port proxies are used when non-structural entities need access to
45 * the memory system (or structural entities that want to peak into
46 * the memory system without making a real memory access).
47 *
48 * Proxy objects replace the previous FunctionalPort, TranslatingPort
49 * and VirtualPort objects, which provided the same functionality as
50 * the proxies, but were instances of ports not corresponding to real
51 * structural ports of the simulated system. Via the port proxies all
52 * the accesses go through an actual port (either the system port,
53 * e.g. for processes or initialisation, or a the data port of the
54 * CPU, e.g. for threads) and thus are transparent to a potentially
55 * distributed memory and automatically adhere to the memory map of
56 * the system.
57 */
58
59#ifndef __MEM_PORT_PROXY_HH__
60#define __MEM_PORT_PROXY_HH__
61
|
62#include "mem/port.hh"
63#include "sim/byteswap.hh"
64
65/**
66 * This object is a proxy for a structural port, to be used for debug
67 * accesses.
68 *
69 * This proxy object is used when non structural entities
70 * (e.g. thread contexts, object file loaders) need access to the
71 * memory system. It calls the corresponding functions on the underlying
72 * structural port, and provides templatized convenience access functions.
73 *
74 * The addresses are interpreted as physical addresses.
75 *
76 * @sa SETranslatingProxy
77 * @sa FSTranslatingProxy
78 */
79class PortProxy
80{
81 private:
82
83 /** The actual physical port used by this proxy. */
84 MasterPort &_port;
85
86 /** Granularity of any transactions issued through this proxy. */
87 const unsigned int _cacheLineSize;
88
89 public:
90 PortProxy(MasterPort &port, unsigned int cacheLineSize) :
91 _port(port), _cacheLineSize(cacheLineSize)
92 {}
93 virtual ~PortProxy() { }
94
95
96
97 /** Fixed functionality for use in base classes. */
98
99 /**
100 * Read size bytes memory at physical address and store in p.
101 */
102 void readBlobPhys(Addr addr, Request::Flags flags,
103 void *p, int size) const;
104
105 /**
106 * Write size bytes from p to physical address.
107 */
108 void writeBlobPhys(Addr addr, Request::Flags flags,
109 const void *p, int size) const;
110
111 /**
112 * Fill size bytes starting at physical addr with byte value val.
113 */
114 void memsetBlobPhys(Addr addr, Request::Flags flags,
115 uint8_t v, int size) const;
116
117
118
119 /** Methods to override in base classes */
120
121 /**
122 * Read size bytes memory at address and store in p.
123 * Returns true on success and false on failure.
124 */
125 virtual bool
126 tryReadBlob(Addr addr, void *p, int size) const
127 {
128 readBlobPhys(addr, 0, p, size);
129 return true;
130 }
131
132 /**
133 * Write size bytes from p to address.
134 * Returns true on success and false on failure.
135 */
136 virtual bool
137 tryWriteBlob(Addr addr, const void *p, int size) const
138 {
139 writeBlobPhys(addr, 0, p, size);
140 return true;
141 }
142
143 /**
144 * Fill size bytes starting at addr with byte value val.
145 * Returns true on success and false on failure.
146 */
147 virtual bool
148 tryMemsetBlob(Addr addr, uint8_t val, int size) const
149 {
150 memsetBlobPhys(addr, 0, val, size);
151 return true;
152 }
153
154
155
156 /** Higher level interfaces based on the above. */
157
158 /**
159 * Same as tryReadBlob, but insists on success.
160 */
161 void
162 readBlob(Addr addr, void *p, int size) const
163 {
164 if (!tryReadBlob(addr, p, size))
165 fatal("readBlob(%#x, ...) failed", addr);
166 }
167
168 /**
169 * Same as tryWriteBlob, but insists on success.
170 */
171 void
172 writeBlob(Addr addr, const void *p, int size) const
173 {
174 if (!tryWriteBlob(addr, p, size))
175 fatal("writeBlob(%#x, ...) failed", addr);
176 }
177
178 /**
179 * Same as tryMemsetBlob, but insists on success.
180 */
181 void
182 memsetBlob(Addr addr, uint8_t v, int size) const
183 {
184 if (!tryMemsetBlob(addr, v, size))
185 fatal("memsetBlob(%#x, ...) failed", addr);
186 }
187
188 /**
189 * Read sizeof(T) bytes from address and return as object T.
190 */
191 template <typename T>
192 T read(Addr address) const;
193
194 /**
195 * Write object T to address. Writes sizeof(T) bytes.
196 */
197 template <typename T>
198 void write(Addr address, const T &data) const;
199
200 /**
201 * Read sizeof(T) bytes from address and return as object T.
202 * Performs endianness conversion from the selected guest to host order.
203 */
204 template <typename T>
205 T read(Addr address, ByteOrder guest_byte_order) const;
206
207 /**
208 * Write object T to address. Writes sizeof(T) bytes.
209 * Performs endianness conversion from host to the selected guest order.
210 */
211 template <typename T>
212 void write(Addr address, T data, ByteOrder guest_byte_order) const;
213
214 /**
215 * Write the string str into guest memory at address addr.
216 * Returns true on success and false on failure.
217 */
218 bool tryWriteString(Addr addr, const char *str) const;
219
220 /**
221 * Same as tryWriteString, but insists on success.
222 */
223 void
224 writeString(Addr addr, const char *str) const
225 {
226 if (!tryWriteString(addr, str))
227 fatal("writeString(%#x, ...) failed", addr);
228 }
229
230 /**
231 * Reads the string at guest address addr into the std::string str.
232 * Returns true on success and false on failure.
233 */
234 bool tryReadString(std::string &str, Addr addr) const;
235
236 /**
237 * Same as tryReadString, but insists on success.
238 */
239 void
240 readString(std::string &str, Addr addr) const
241 {
242 if (!tryReadString(str, addr))
243 fatal("readString(%#x, ...) failed", addr);
244 }
| 64#include "mem/port.hh"
65#include "sim/byteswap.hh"
66
67/**
68 * This object is a proxy for a structural port, to be used for debug
69 * accesses.
70 *
71 * This proxy object is used when non structural entities
72 * (e.g. thread contexts, object file loaders) need access to the
73 * memory system. It calls the corresponding functions on the underlying
74 * structural port, and provides templatized convenience access functions.
75 *
76 * The addresses are interpreted as physical addresses.
77 *
78 * @sa SETranslatingProxy
79 * @sa FSTranslatingProxy
80 */
81class PortProxy
82{
83 private:
84
85 /** The actual physical port used by this proxy. */
86 MasterPort &_port;
87
88 /** Granularity of any transactions issued through this proxy. */
89 const unsigned int _cacheLineSize;
90
91 public:
92 PortProxy(MasterPort &port, unsigned int cacheLineSize) :
93 _port(port), _cacheLineSize(cacheLineSize)
94 {}
95 virtual ~PortProxy() { }
96
97
98
99 /** Fixed functionality for use in base classes. */
100
101 /**
102 * Read size bytes memory at physical address and store in p.
103 */
104 void readBlobPhys(Addr addr, Request::Flags flags,
105 void *p, int size) const;
106
107 /**
108 * Write size bytes from p to physical address.
109 */
110 void writeBlobPhys(Addr addr, Request::Flags flags,
111 const void *p, int size) const;
112
113 /**
114 * Fill size bytes starting at physical addr with byte value val.
115 */
116 void memsetBlobPhys(Addr addr, Request::Flags flags,
117 uint8_t v, int size) const;
118
119
120
121 /** Methods to override in base classes */
122
123 /**
124 * Read size bytes memory at address and store in p.
125 * Returns true on success and false on failure.
126 */
127 virtual bool
128 tryReadBlob(Addr addr, void *p, int size) const
129 {
130 readBlobPhys(addr, 0, p, size);
131 return true;
132 }
133
134 /**
135 * Write size bytes from p to address.
136 * Returns true on success and false on failure.
137 */
138 virtual bool
139 tryWriteBlob(Addr addr, const void *p, int size) const
140 {
141 writeBlobPhys(addr, 0, p, size);
142 return true;
143 }
144
145 /**
146 * Fill size bytes starting at addr with byte value val.
147 * Returns true on success and false on failure.
148 */
149 virtual bool
150 tryMemsetBlob(Addr addr, uint8_t val, int size) const
151 {
152 memsetBlobPhys(addr, 0, val, size);
153 return true;
154 }
155
156
157
158 /** Higher level interfaces based on the above. */
159
160 /**
161 * Same as tryReadBlob, but insists on success.
162 */
163 void
164 readBlob(Addr addr, void *p, int size) const
165 {
166 if (!tryReadBlob(addr, p, size))
167 fatal("readBlob(%#x, ...) failed", addr);
168 }
169
170 /**
171 * Same as tryWriteBlob, but insists on success.
172 */
173 void
174 writeBlob(Addr addr, const void *p, int size) const
175 {
176 if (!tryWriteBlob(addr, p, size))
177 fatal("writeBlob(%#x, ...) failed", addr);
178 }
179
180 /**
181 * Same as tryMemsetBlob, but insists on success.
182 */
183 void
184 memsetBlob(Addr addr, uint8_t v, int size) const
185 {
186 if (!tryMemsetBlob(addr, v, size))
187 fatal("memsetBlob(%#x, ...) failed", addr);
188 }
189
190 /**
191 * Read sizeof(T) bytes from address and return as object T.
192 */
193 template <typename T>
194 T read(Addr address) const;
195
196 /**
197 * Write object T to address. Writes sizeof(T) bytes.
198 */
199 template <typename T>
200 void write(Addr address, const T &data) const;
201
202 /**
203 * Read sizeof(T) bytes from address and return as object T.
204 * Performs endianness conversion from the selected guest to host order.
205 */
206 template <typename T>
207 T read(Addr address, ByteOrder guest_byte_order) const;
208
209 /**
210 * Write object T to address. Writes sizeof(T) bytes.
211 * Performs endianness conversion from host to the selected guest order.
212 */
213 template <typename T>
214 void write(Addr address, T data, ByteOrder guest_byte_order) const;
215
216 /**
217 * Write the string str into guest memory at address addr.
218 * Returns true on success and false on failure.
219 */
220 bool tryWriteString(Addr addr, const char *str) const;
221
222 /**
223 * Same as tryWriteString, but insists on success.
224 */
225 void
226 writeString(Addr addr, const char *str) const
227 {
228 if (!tryWriteString(addr, str))
229 fatal("writeString(%#x, ...) failed", addr);
230 }
231
232 /**
233 * Reads the string at guest address addr into the std::string str.
234 * Returns true on success and false on failure.
235 */
236 bool tryReadString(std::string &str, Addr addr) const;
237
238 /**
239 * Same as tryReadString, but insists on success.
240 */
241 void
242 readString(std::string &str, Addr addr) const
243 {
244 if (!tryReadString(str, addr))
245 fatal("readString(%#x, ...) failed", addr);
246 }
|
245};
246
247
248template <typename T>
249T
250PortProxy::read(Addr address) const
251{
252 T data;
253 readBlob(address, &data, sizeof(T));
254 return data;
255}
256
257template <typename T>
258void
259PortProxy::write(Addr address, const T &data) const
260{
261 writeBlob(address, &data, sizeof(T));
262}
263
264template <typename T>
265T
266PortProxy::read(Addr address, ByteOrder byte_order) const
267{
268 T data;
269 readBlob(address, &data, sizeof(T));
270 return gtoh(data, byte_order);
271}
272
273template <typename T>
274void
275PortProxy::write(Addr address, T data, ByteOrder byte_order) const
276{
277 data = htog(data, byte_order);
278 writeBlob(address, &data, sizeof(T));
279}
280
281#endif // __MEM_PORT_PROXY_HH__
| 264};
265
266
267template <typename T>
268T
269PortProxy::read(Addr address) const
270{
271 T data;
272 readBlob(address, &data, sizeof(T));
273 return data;
274}
275
276template <typename T>
277void
278PortProxy::write(Addr address, const T &data) const
279{
280 writeBlob(address, &data, sizeof(T));
281}
282
283template <typename T>
284T
285PortProxy::read(Addr address, ByteOrder byte_order) const
286{
287 T data;
288 readBlob(address, &data, sizeof(T));
289 return gtoh(data, byte_order);
290}
291
292template <typename T>
293void
294PortProxy::write(Addr address, T data, ByteOrder byte_order) const
295{
296 data = htog(data, byte_order);
297 writeBlob(address, &data, sizeof(T));
298}
299
300#endif // __MEM_PORT_PROXY_HH__
|