1/*
2 * Copyright (c) 2011-2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
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45/**
46 * @file
47 * Port Object Declaration.
48 */
49
50#ifndef __MEM_PORT_HH__
51#define __MEM_PORT_HH__
52
53#include "base/addr_range.hh"
54#include "mem/packet.hh"
55
56class MemObject;
57
58/**
59 * Ports are used to interface memory objects to each other. A port is
60 * either a master or a slave and the connected peer is always of the
61 * opposite role. Each port has a name, an owner, and an identifier.
62 */
63class Port
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2 * Copyright (c) 2011-2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
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45/**
46 * @file
47 * Port Object Declaration.
48 */
49
50#ifndef __MEM_PORT_HH__
51#define __MEM_PORT_HH__
52
53#include "base/addr_range.hh"
54#include "mem/packet.hh"
55
56class MemObject;
57
58/**
59 * Ports are used to interface memory objects to each other. A port is
60 * either a master or a slave and the connected peer is always of the
61 * opposite role. Each port has a name, an owner, and an identifier.
62 */
63class Port
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