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< #include "mem/mem_object.hh"
---
> #include "sim/sim_object.hh"
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< MasterPort::MasterPort(const std::string& name, MemObject* _owner, PortID _id)
---
> MasterPort::MasterPort(const std::string& name, SimObject* _owner, PortID _id)
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< SlavePort::SlavePort(const std::string& name, MemObject* _owner, PortID id)
---
> SlavePort::SlavePort(const std::string& name, SimObject* _owner, PortID id)