physical.cc (2640:266b80dd5eca) physical.cc (2641:6d9d837e2032)
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 114 unchanged lines hidden (view full) ---

123}
124
125bool
126PhysicalMemory::doTimingAccess (Packet *pkt, MemoryPort* memoryPort)
127{
128 doFunctionalAccess(pkt);
129
130 // turn packet around to go back to requester
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 114 unchanged lines hidden (view full) ---

123}
124
125bool
126PhysicalMemory::doTimingAccess (Packet *pkt, MemoryPort* memoryPort)
127{
128 doFunctionalAccess(pkt);
129
130 // turn packet around to go back to requester
131 pkt->dest = pkt->src;
131 pkt->makeTimingResponse();
132 MemResponseEvent* response = new MemResponseEvent(pkt, memoryPort);
133 response->schedule(curTick + lat);
134
135 return true;
136}
137
138Tick
139PhysicalMemory::doAtomicAccess(Packet *pkt)
140{
141 doFunctionalAccess(pkt);
142 pkt->time = curTick + lat;
143 return curTick + lat;
144}
145
146void
147PhysicalMemory::doFunctionalAccess(Packet *pkt)
148{
132 MemResponseEvent* response = new MemResponseEvent(pkt, memoryPort);
133 response->schedule(curTick + lat);
134
135 return true;
136}
137
138Tick
139PhysicalMemory::doAtomicAccess(Packet *pkt)
140{
141 doFunctionalAccess(pkt);
142 pkt->time = curTick + lat;
143 return curTick + lat;
144}
145
146void
147PhysicalMemory::doFunctionalAccess(Packet *pkt)
148{
149 assert(pkt->addr + pkt->size < pmem_size);
149 assert(pkt->getAddr() + pkt->getSize() < pmem_size);
150
151 switch (pkt->cmd) {
150
151 switch (pkt->cmd) {
152 case Read:
153 memcpy(pkt->getPtr<uint8_t>(), pmem_addr + pkt->addr - base_addr,
154 pkt->size);
152 case Packet::ReadReq:
153 memcpy(pkt->getPtr(),
154 pmem_addr + pkt->getAddr() - base_addr,
155 pkt->getSize());
155 break;
156 break;
156 case Write:
157 memcpy(pmem_addr + pkt->addr - base_addr, pkt->getPtr<uint8_t>(),
158 pkt->size);
157 case Packet::WriteReq:
158 memcpy(pmem_addr + pkt->getAddr() - base_addr,
159 pkt->getPtr<uint8_t>(),
160 pkt->getSize());
159 // temporary hack: will need to add real LL/SC implementation
160 // for cacheless systems later.
161 if (pkt->req->getFlags() & LOCKED) {
162 pkt->req->setScResult(1);
163 }
164 break;
165 default:
166 panic("unimplemented");
167 }
168
161 // temporary hack: will need to add real LL/SC implementation
162 // for cacheless systems later.
163 if (pkt->req->getFlags() & LOCKED) {
164 pkt->req->setScResult(1);
165 }
166 break;
167 default:
168 panic("unimplemented");
169 }
170
169 pkt->result = Success;
171 pkt->result = Packet::Success;
170}
171
172Port *
173PhysicalMemory::getPort(const std::string &if_name)
174{
175 if (if_name == "") {
176 if (port != NULL)
177 panic("PhysicalMemory::getPort: additional port requested to memory!");

--- 198 unchanged lines hidden --- 		172}
173
174Port *
175PhysicalMemory::getPort(const std::string &if_name)
176{
177 if (if_name == "") {
178 if (port != NULL)
179 panic("PhysicalMemory::getPort: additional port requested to memory!");

--- 198 unchanged lines hidden ---