physical.cc (11793:ef606668d247) physical.cc (12776:410b60d8a397)
1/*
1/*
2 * Copyright (c) 2012, 2014 ARM Limited
2 * Copyright (c) 2012, 2014, 2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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236bool
237PhysicalMemory::isMemAddr(Addr addr) const
238{
239 // see if the address is within the last matched range
240 if (rangeCache != addrMap.end() && rangeCache->first.contains(addr)) {
241 return true;
242 } else {
243 // lookup in the interval tree
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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236bool
237PhysicalMemory::isMemAddr(Addr addr) const
238{
239 // see if the address is within the last matched range
240 if (rangeCache != addrMap.end() && rangeCache->first.contains(addr)) {
241 return true;
242 } else {
243 // lookup in the interval tree
244 const auto& r = addrMap.find(addr);
244 const auto& r = addrMap.contains(addr);
245 if (r == addrMap.end()) {
246 // not in the cache, and not in the tree
247 return false;
248 }
249 // the range is in the tree, update the cache
250 rangeCache = r;
251 return true;
252 }

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293{
294 assert(pkt->isRequest());
295 Addr addr = pkt->getAddr();
296 if (rangeCache != addrMap.end() && rangeCache->first.contains(addr)) {
297 rangeCache->second->access(pkt);
298 } else {
299 // do not update the cache here, as we typically call
300 // isMemAddr before calling access
245 if (r == addrMap.end()) {
246 // not in the cache, and not in the tree
247 return false;
248 }
249 // the range is in the tree, update the cache
250 rangeCache = r;
251 return true;
252 }

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293{
294 assert(pkt->isRequest());
295 Addr addr = pkt->getAddr();
296 if (rangeCache != addrMap.end() && rangeCache->first.contains(addr)) {
297 rangeCache->second->access(pkt);
298 } else {
299 // do not update the cache here, as we typically call
300 // isMemAddr before calling access
301 const auto& m = addrMap.find(addr);
301 const auto& m = addrMap.contains(addr);
302 assert(m != addrMap.end());
303 m->second->access(pkt);
304 }
305}
306
307void
308PhysicalMemory::functionalAccess(PacketPtr pkt)
309{
310 assert(pkt->isRequest());
311 Addr addr = pkt->getAddr();
312 if (rangeCache != addrMap.end() && rangeCache->first.contains(addr)) {
313 rangeCache->second->functionalAccess(pkt);
314 } else {
315 // do not update the cache here, as we typically call
316 // isMemAddr before calling functionalAccess
302 assert(m != addrMap.end());
303 m->second->access(pkt);
304 }
305}
306
307void
308PhysicalMemory::functionalAccess(PacketPtr pkt)
309{
310 assert(pkt->isRequest());
311 Addr addr = pkt->getAddr();
312 if (rangeCache != addrMap.end() && rangeCache->first.contains(addr)) {
313 rangeCache->second->functionalAccess(pkt);
314 } else {
315 // do not update the cache here, as we typically call
316 // isMemAddr before calling functionalAccess
317 const auto& m = addrMap.find(addr);
317 const auto& m = addrMap.contains(addr);
318 assert(m != addrMap.end());
319 m->second->functionalAccess(pkt);
320 }
321}
322
323void
324PhysicalMemory::serialize(CheckpointOut &cp) const
325{

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401{
402 // unserialize the locked addresses and map them to the
403 // appropriate memory controller
404 vector<Addr> lal_addr;
405 vector<ContextID> lal_cid;
406 UNSERIALIZE_CONTAINER(lal_addr);
407 UNSERIALIZE_CONTAINER(lal_cid);
408 for (size_t i = 0; i < lal_addr.size(); ++i) {
318 assert(m != addrMap.end());
319 m->second->functionalAccess(pkt);
320 }
321}
322
323void
324PhysicalMemory::serialize(CheckpointOut &cp) const
325{

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401{
402 // unserialize the locked addresses and map them to the
403 // appropriate memory controller
404 vector<Addr> lal_addr;
405 vector<ContextID> lal_cid;
406 UNSERIALIZE_CONTAINER(lal_addr);
407 UNSERIALIZE_CONTAINER(lal_cid);
408 for (size_t i = 0; i < lal_addr.size(); ++i) {
409 const auto& m = addrMap.find(lal_addr[i]);
409 const auto& m = addrMap.contains(lal_addr[i]);
410 m->second->addLockedAddr(LockedAddr(lal_addr[i], lal_cid[i]));
411 }
412
413 // unserialize the backing stores
414 unsigned int nbr_of_stores;
415 UNSERIALIZE_SCALAR(nbr_of_stores);
416
417 for (unsigned int i = 0; i < nbr_of_stores; ++i) {

--- 65 unchanged lines hidden --- 		410 m->second->addLockedAddr(LockedAddr(lal_addr[i], lal_cid[i]));
411 }
412
413 // unserialize the backing stores
414 unsigned int nbr_of_stores;
415 UNSERIALIZE_SCALAR(nbr_of_stores);
416
417 for (unsigned int i = 0; i < nbr_of_stores; ++i) {

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