1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Ron Dreslinski 29 * Ali Saidi 30 */ 31 32#include <sys/types.h> 33#include <sys/mman.h> 34#include <errno.h> 35#include <fcntl.h> 36#include <unistd.h> 37#include <zlib.h> 38 39#include <iostream> 40#include <string> 41 42 43#include "base/misc.hh" 44#include "config/full_system.hh" 45#include "mem/packet_impl.hh" 46#include "mem/physical.hh" 47#include "sim/host.hh" 48#include "sim/builder.hh" 49#include "sim/eventq.hh" 50#include "arch/isa_traits.hh" 51 52 53using namespace std; 54using namespace TheISA; 55 56 57PhysicalMemory::PhysicalMemory(Params *p) 58 : MemObject(p->name), pmemAddr(NULL), port(NULL), lat(p->latency), _params(p) 59{ 60 if (params()->addrRange.size() % TheISA::PageBytes != 0) 61 panic("Memory Size not divisible by page size\n"); 62 63 int map_flags = MAP_ANON | MAP_PRIVATE; 64 pmemAddr = (uint8_t *)mmap(NULL, params()->addrRange.size(), PROT_READ | PROT_WRITE, 65 map_flags, -1, 0); 66 67 if (pmemAddr == (void *)MAP_FAILED) { 68 perror("mmap"); 69 fatal("Could not mmap!\n"); 70 } 71 72 pagePtr = 0; 73} 74 75void 76PhysicalMemory::init() 77{ 78 if (!port) 79 panic("PhysicalMemory not connected to anything!"); 80 port->sendStatusChange(Port::RangeChange); 81} 82 83PhysicalMemory::~PhysicalMemory() 84{ 85 if (pmemAddr) 86 munmap(pmemAddr, params()->addrRange.size()); 87 //Remove memPorts? 88} 89 90Addr 91PhysicalMemory::new_page() 92{ 93 Addr return_addr = pagePtr << LogVMPageSize; 94 return_addr += params()->addrRange.start; 95 96 ++pagePtr; 97 return return_addr; 98} 99 100int 101PhysicalMemory::deviceBlockSize() 102{ 103 //Can accept anysize request 104 return 0; 105} 106 107Tick 108PhysicalMemory::calculateLatency(Packet *pkt) 109{ 110 return lat; 111} 112 113 114 115// Add load-locked to tracking list. Should only be called if the 116// operation is a load and the LOCKED flag is set. 117void 118PhysicalMemory::trackLoadLocked(Request *req) 119{ 120 Addr paddr = LockedAddr::mask(req->getPaddr()); 121 122 // first we check if we already have a locked addr for this 123 // xc. Since each xc only gets one, we just update the 124 // existing record with the new address. 125 list<LockedAddr>::iterator i; 126 127 for (i = lockedAddrList.begin(); i != lockedAddrList.end(); ++i) { 128 if (i->matchesContext(req)) { 129 DPRINTF(LLSC, "Modifying lock record: cpu %d thread %d addr %#x\n", 130 req->getCpuNum(), req->getThreadNum(), paddr); 131 i->addr = paddr; 132 return; 133 } 134 } 135 136 // no record for this xc: need to allocate a new one 137 DPRINTF(LLSC, "Adding lock record: cpu %d thread %d addr %#x\n", 138 req->getCpuNum(), req->getThreadNum(), paddr); 139 lockedAddrList.push_front(LockedAddr(req)); 140} 141 142 143// Called on *writes* only... both regular stores and 144// store-conditional operations. Check for conventional stores which 145// conflict with locked addresses, and for success/failure of store 146// conditionals. 147bool 148PhysicalMemory::checkLockedAddrList(Request *req) 149{ 150 Addr paddr = LockedAddr::mask(req->getPaddr()); 151 bool isLocked = req->isLocked(); 152 153 // Initialize return value. Non-conditional stores always 154 // succeed. Assume conditional stores will fail until proven 155 // otherwise. 156 bool success = !isLocked; 157 158 // Iterate over list. Note that there could be multiple matching 159 // records, as more than one context could have done a load locked 160 // to this location. 161 list<LockedAddr>::iterator i = lockedAddrList.begin(); 162 163 while (i != lockedAddrList.end()) { 164 165 if (i->addr == paddr) { 166 // we have a matching address 167 168 if (isLocked && i->matchesContext(req)) { 169 // it's a store conditional, and as far as the memory 170 // system can tell, the requesting context's lock is 171 // still valid. 172 DPRINTF(LLSC, "StCond success: cpu %d thread %d addr %#x\n", 173 req->getCpuNum(), req->getThreadNum(), paddr); 174 success = true; 175 } 176 177 // Get rid of our record of this lock and advance to next 178 DPRINTF(LLSC, "Erasing lock record: cpu %d thread %d addr %#x\n", 179 i->cpuNum, i->threadNum, paddr); 180 i = lockedAddrList.erase(i); 181 } 182 else { 183 // no match: advance to next record 184 ++i; 185 } 186 } 187 188 if (isLocked) { 189 req->setScResult(success ? 1 : 0); 190 } 191 192 return success; 193} 194 195void 196PhysicalMemory::doFunctionalAccess(Packet *pkt) 197{ 198 assert(pkt->getAddr() + pkt->getSize() < params()->addrRange.size()); 199 200 if (pkt->isRead()) { 201 if (pkt->req->isLocked()) { 202 trackLoadLocked(pkt->req); 203 } 204 memcpy(pkt->getPtr<uint8_t>(), 205 pmemAddr + pkt->getAddr() - params()->addrRange.start, 206 pkt->getSize()); 207 } 208 else if (pkt->isWrite()) { 209 if (writeOK(pkt->req)) { 210 memcpy(pmemAddr + pkt->getAddr() - params()->addrRange.start, 211 pkt->getPtr<uint8_t>(), pkt->getSize()); 212 } 213 } 214 else if (pkt->isInvalidate()) { 215 //upgrade or invalidate 216 pkt->flags |= SATISFIED; 217 } 218 else { 219 panic("unimplemented"); 220 } 221 222 pkt->result = Packet::Success; 223} 224 225Port * 226PhysicalMemory::getPort(const std::string &if_name, int idx) 227{ 228 if (if_name == "port" && idx == -1) { 229 if (port != NULL) 230 panic("PhysicalMemory::getPort: additional port requested to memory!"); 231 port = new MemoryPort(name() + "-port", this); 232 return port; 233 } else if (if_name == "functional") {
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235 return new MemoryPort(name() + "-funcport", this); 236 } else { 237 panic("PhysicalMemory::getPort: unknown port %s requested", if_name); 238 } 239} 240 241void 242PhysicalMemory::recvStatusChange(Port::Status status) 243{ 244} 245 246PhysicalMemory::MemoryPort::MemoryPort(const std::string &_name, 247 PhysicalMemory *_memory) 248 : SimpleTimingPort(_name), memory(_memory) 249{ } 250 251void 252PhysicalMemory::MemoryPort::recvStatusChange(Port::Status status) 253{ 254 memory->recvStatusChange(status); 255} 256 257void 258PhysicalMemory::MemoryPort::getDeviceAddressRanges(AddrRangeList &resp, 259 AddrRangeList &snoop) 260{ 261 memory->getAddressRanges(resp, snoop); 262} 263 264void 265PhysicalMemory::getAddressRanges(AddrRangeList &resp, AddrRangeList &snoop) 266{ 267 snoop.clear(); 268 resp.clear(); 269 resp.push_back(RangeSize(params()->addrRange.start, 270 params()->addrRange.size())); 271} 272 273int 274PhysicalMemory::MemoryPort::deviceBlockSize() 275{ 276 return memory->deviceBlockSize(); 277} 278 279Tick 280PhysicalMemory::MemoryPort::recvAtomic(Packet *pkt) 281{ 282 memory->doFunctionalAccess(pkt); 283 return memory->calculateLatency(pkt); 284} 285 286void 287PhysicalMemory::MemoryPort::recvFunctional(Packet *pkt) 288{ 289 // Default implementation of SimpleTimingPort::recvFunctional() 290 // calls recvAtomic() and throws away the latency; we can save a 291 // little here by just not calculating the latency. 292 memory->doFunctionalAccess(pkt); 293} 294 295unsigned int 296PhysicalMemory::drain(Event *de) 297{ 298 int count = port->drain(de); 299 if (count) 300 changeState(Draining); 301 else 302 changeState(Drained); 303 return count; 304} 305 306void 307PhysicalMemory::serialize(ostream &os) 308{ 309 gzFile compressedMem; 310 string filename = name() + ".physmem"; 311 312 SERIALIZE_SCALAR(filename); 313 314 // write memory file 315 string thefile = Checkpoint::dir() + "/" + filename.c_str(); 316 int fd = creat(thefile.c_str(), 0664); 317 if (fd < 0) { 318 perror("creat"); 319 fatal("Can't open physical memory checkpoint file '%s'\n", filename); 320 } 321 322 compressedMem = gzdopen(fd, "wb"); 323 if (compressedMem == NULL) 324 fatal("Insufficient memory to allocate compression state for %s\n", 325 filename); 326 327 if (gzwrite(compressedMem, pmemAddr, params()->addrRange.size()) != params()->addrRange.size()) { 328 fatal("Write failed on physical memory checkpoint file '%s'\n", 329 filename); 330 } 331 332 if (gzclose(compressedMem)) 333 fatal("Close failed on physical memory checkpoint file '%s'\n", 334 filename); 335} 336 337void 338PhysicalMemory::unserialize(Checkpoint *cp, const string §ion) 339{ 340 gzFile compressedMem; 341 long *tempPage; 342 long *pmem_current; 343 uint64_t curSize; 344 uint32_t bytesRead; 345 const int chunkSize = 16384; 346 347 348 string filename; 349 350 UNSERIALIZE_SCALAR(filename); 351 352 filename = cp->cptDir + "/" + filename; 353 354 // mmap memoryfile 355 int fd = open(filename.c_str(), O_RDONLY); 356 if (fd < 0) { 357 perror("open"); 358 fatal("Can't open physical memory checkpoint file '%s'", filename); 359 } 360 361 compressedMem = gzdopen(fd, "rb"); 362 if (compressedMem == NULL) 363 fatal("Insufficient memory to allocate compression state for %s\n", 364 filename); 365 366 // unmap file that was mmaped in the constructor 367 // This is done here to make sure that gzip and open don't muck with our 368 // nice large space of memory before we reallocate it 369 munmap(pmemAddr, params()->addrRange.size()); 370 371 pmemAddr = (uint8_t *)mmap(NULL, params()->addrRange.size(), PROT_READ | PROT_WRITE, 372 MAP_ANON | MAP_PRIVATE, -1, 0); 373 374 if (pmemAddr == (void *)MAP_FAILED) { 375 perror("mmap"); 376 fatal("Could not mmap physical memory!\n"); 377 } 378 379 curSize = 0; 380 tempPage = (long*)malloc(chunkSize); 381 if (tempPage == NULL) 382 fatal("Unable to malloc memory to read file %s\n", filename); 383 384 /* Only copy bytes that are non-zero, so we don't give the VM system hell */ 385 while (curSize < params()->addrRange.size()) { 386 bytesRead = gzread(compressedMem, tempPage, chunkSize); 387 if (bytesRead != chunkSize && bytesRead != params()->addrRange.size() - curSize) 388 fatal("Read failed on physical memory checkpoint file '%s'" 389 " got %d bytes, expected %d or %d bytes\n", 390 filename, bytesRead, chunkSize, params()->addrRange.size()-curSize); 391 392 assert(bytesRead % sizeof(long) == 0); 393 394 for (int x = 0; x < bytesRead/sizeof(long); x++) 395 { 396 if (*(tempPage+x) != 0) { 397 pmem_current = (long*)(pmemAddr + curSize + x * sizeof(long)); 398 *pmem_current = *(tempPage+x); 399 } 400 } 401 curSize += bytesRead; 402 } 403 404 free(tempPage); 405 406 if (gzclose(compressedMem)) 407 fatal("Close failed on physical memory checkpoint file '%s'\n", 408 filename); 409 410} 411 412 413BEGIN_DECLARE_SIM_OBJECT_PARAMS(PhysicalMemory) 414 415 Param<string> file; 416 Param<Range<Addr> > range; 417 Param<Tick> latency; 418 419END_DECLARE_SIM_OBJECT_PARAMS(PhysicalMemory) 420 421BEGIN_INIT_SIM_OBJECT_PARAMS(PhysicalMemory) 422 423 INIT_PARAM_DFLT(file, "memory mapped file", ""), 424 INIT_PARAM(range, "Device Address Range"), 425 INIT_PARAM(latency, "Memory access latency") 426 427END_INIT_SIM_OBJECT_PARAMS(PhysicalMemory) 428 429CREATE_SIM_OBJECT(PhysicalMemory) 430{ 431 PhysicalMemory::Params *p = new PhysicalMemory::Params; 432 p->name = getInstanceName(); 433 p->addrRange = range; 434 p->latency = latency; 435 return new PhysicalMemory(p); 436} 437 438REGISTER_SIM_OBJECT("PhysicalMemory", PhysicalMemory)
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