1/* 2 * Copyright (c) 2012 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 81 unchanged lines hidden (view full) --- 90 // memories are allowed to overlap in the logic address 91 // map 92 vector<AbstractMemory*> unmapped_mems; 93 unmapped_mems.push_back(*m); 94 createBackingStore((*m)->getAddrRange(), unmapped_mems); 95 } 96 } 97 |
98 // iterate over the increasing addresses and chunks of contigous 99 // space to be mapped to backing store, also remember what 100 // memories constitute the range so we can go and find out if we 101 // have to init their parts to zero |
102 vector<AbstractMemory*> curr_memories; 103 for (AddrRangeMap<AbstractMemory*>::const_iterator r = addrMap.begin(); 104 r != addrMap.end(); ++r) { 105 // simply skip past all memories that are null and hence do 106 // not need any backing store 107 if (!r->second->isNull()) { |
108 // this will eventually be extended to support merging of 109 // interleaved address ranges, and although it might seem 110 // overly complicated at this point it will all be used 111 curr_memories.push_back(r->second); 112 createBackingStore(r->first, curr_memories); 113 curr_memories.clear(); |
114 } 115 } |
116} 117 118void 119PhysicalMemory::createBackingStore(AddrRange range, 120 const vector<AbstractMemory*>& _memories) 121{ 122 // perform the actual mmap 123 DPRINTF(BusAddrRanges, "Creating backing store for range %x:%x\n", --- 8 unchanged lines hidden (view full) --- 132 fatal("Could not mmap %d bytes for range %x:%x!\n", range.size(), 133 range.start, range.end); 134 } 135 136 // remember this backing store so we can checkpoint it and unmap 137 // it appropriately 138 backingStore.push_back(make_pair(range, pmem)); 139 |
140 // count how many of the memories are to be zero initialized so we 141 // can see if some but not all have this parameter set 142 uint32_t init_to_zero = 0; 143 |
144 // point the memories to their backing store, and if requested, 145 // initialize the memory range to 0 146 for (vector<AbstractMemory*>::const_iterator m = _memories.begin(); 147 m != _memories.end(); ++m) { 148 DPRINTF(BusAddrRanges, "Mapping memory %s to backing store\n", 149 (*m)->name()); 150 (*m)->setBackingStore(pmem); 151 152 // if it should be zero, then go and make it so |
153 if ((*m)->initToZero()) { 154 ++init_to_zero; 155 } 156 } |
157 |
158 if (init_to_zero != 0) { 159 if (init_to_zero != _memories.size()) 160 fatal("Some, but not all memories in range %x:%x are set zero\n", 161 range.start, range.end); 162 163 memset(pmem, 0, range.size()); |
164 } 165} 166 167PhysicalMemory::~PhysicalMemory() 168{ 169 // unmap the backing store 170 for (vector<pair<AddrRange, uint8_t*> >::iterator s = backingStore.begin(); 171 s != backingStore.end(); ++s) --- 248 unchanged lines hidden --- |