1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ron Dreslinski
29 * Ali Saidi
30 */
31
32#include <sys/types.h>
33#include <sys/mman.h>
34#include <errno.h>
35#include <fcntl.h>
36#include <unistd.h>
37#include <zlib.h>
38
39#include <iostream>
40#include <string>
41
42#include "arch/isa_traits.hh"
43#include "base/misc.hh"
44#include "config/full_system.hh"
45#include "mem/packet_access.hh"
46#include "mem/physical.hh"
47#include "sim/builder.hh"
48#include "sim/eventq.hh"
49#include "sim/host.hh"
50
51using namespace std;
52using namespace TheISA;
53
54PhysicalMemory::PhysicalMemory(Params *p)
55 : MemObject(p->name), pmemAddr(NULL), lat(p->latency), _params(p)
56{
57 if (params()->addrRange.size() % TheISA::PageBytes != 0)
58 panic("Memory Size not divisible by page size\n");
59
60 int map_flags = MAP_ANON | MAP_PRIVATE;
61 pmemAddr = (uint8_t *)mmap(NULL, params()->addrRange.size(), PROT_READ | PROT_WRITE,
62 map_flags, -1, 0);
63
64 if (pmemAddr == (void *)MAP_FAILED) {
65 perror("mmap");
66 fatal("Could not mmap!\n");
67 }
68
69 //If requested, initialize all the memory to 0
70 if(params()->zero)
71 memset(pmemAddr, 0, params()->addrRange.size());
72
73 pagePtr = 0;
74}
75
76void
77PhysicalMemory::init()
78{
| 1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ron Dreslinski
29 * Ali Saidi
30 */
31
32#include <sys/types.h>
33#include <sys/mman.h>
34#include <errno.h>
35#include <fcntl.h>
36#include <unistd.h>
37#include <zlib.h>
38
39#include <iostream>
40#include <string>
41
42#include "arch/isa_traits.hh"
43#include "base/misc.hh"
44#include "config/full_system.hh"
45#include "mem/packet_access.hh"
46#include "mem/physical.hh"
47#include "sim/builder.hh"
48#include "sim/eventq.hh"
49#include "sim/host.hh"
50
51using namespace std;
52using namespace TheISA;
53
54PhysicalMemory::PhysicalMemory(Params *p)
55 : MemObject(p->name), pmemAddr(NULL), lat(p->latency), _params(p)
56{
57 if (params()->addrRange.size() % TheISA::PageBytes != 0)
58 panic("Memory Size not divisible by page size\n");
59
60 int map_flags = MAP_ANON | MAP_PRIVATE;
61 pmemAddr = (uint8_t *)mmap(NULL, params()->addrRange.size(), PROT_READ | PROT_WRITE,
62 map_flags, -1, 0);
63
64 if (pmemAddr == (void *)MAP_FAILED) {
65 perror("mmap");
66 fatal("Could not mmap!\n");
67 }
68
69 //If requested, initialize all the memory to 0
70 if(params()->zero)
71 memset(pmemAddr, 0, params()->addrRange.size());
72
73 pagePtr = 0;
74}
75
76void
77PhysicalMemory::init()
78{
|
79 for (PortIterator pi = ports.begin(); pi != ports.end(); ++pi) {
80 if (*pi)
81 (*pi)->sendStatusChange(Port::RangeChange);
82 }
83}
84
85PhysicalMemory::~PhysicalMemory()
86{
87 if (pmemAddr)
88 munmap((char*)pmemAddr, params()->addrRange.size());
89 //Remove memPorts?
90}
91
92Addr
93PhysicalMemory::new_page()
94{
95 Addr return_addr = pagePtr << LogVMPageSize;
96 return_addr += start();
97
98 ++pagePtr;
99 return return_addr;
100}
101
102int
103PhysicalMemory::deviceBlockSize()
104{
105 //Can accept anysize request
106 return 0;
107}
108
109Tick
110PhysicalMemory::calculateLatency(PacketPtr pkt)
111{
112 return lat;
113}
114
115
116
117// Add load-locked to tracking list. Should only be called if the
118// operation is a load and the LOCKED flag is set.
119void
120PhysicalMemory::trackLoadLocked(Request *req)
121{
122 Addr paddr = LockedAddr::mask(req->getPaddr());
123
124 // first we check if we already have a locked addr for this
125 // xc. Since each xc only gets one, we just update the
126 // existing record with the new address.
127 list<LockedAddr>::iterator i;
128
129 for (i = lockedAddrList.begin(); i != lockedAddrList.end(); ++i) {
130 if (i->matchesContext(req)) {
131 DPRINTF(LLSC, "Modifying lock record: cpu %d thread %d addr %#x\n",
132 req->getCpuNum(), req->getThreadNum(), paddr);
133 i->addr = paddr;
134 return;
135 }
136 }
137
138 // no record for this xc: need to allocate a new one
139 DPRINTF(LLSC, "Adding lock record: cpu %d thread %d addr %#x\n",
140 req->getCpuNum(), req->getThreadNum(), paddr);
141 lockedAddrList.push_front(LockedAddr(req));
142}
143
144
145// Called on *writes* only... both regular stores and
146// store-conditional operations. Check for conventional stores which
147// conflict with locked addresses, and for success/failure of store
148// conditionals.
149bool
150PhysicalMemory::checkLockedAddrList(Request *req)
151{
152 Addr paddr = LockedAddr::mask(req->getPaddr());
153 bool isLocked = req->isLocked();
154
155 // Initialize return value. Non-conditional stores always
156 // succeed. Assume conditional stores will fail until proven
157 // otherwise.
158 bool success = !isLocked;
159
160 // Iterate over list. Note that there could be multiple matching
161 // records, as more than one context could have done a load locked
162 // to this location.
163 list<LockedAddr>::iterator i = lockedAddrList.begin();
164
165 while (i != lockedAddrList.end()) {
166
167 if (i->addr == paddr) {
168 // we have a matching address
169
170 if (isLocked && i->matchesContext(req)) {
171 // it's a store conditional, and as far as the memory
172 // system can tell, the requesting context's lock is
173 // still valid.
174 DPRINTF(LLSC, "StCond success: cpu %d thread %d addr %#x\n",
175 req->getCpuNum(), req->getThreadNum(), paddr);
176 success = true;
177 }
178
179 // Get rid of our record of this lock and advance to next
180 DPRINTF(LLSC, "Erasing lock record: cpu %d thread %d addr %#x\n",
181 i->cpuNum, i->threadNum, paddr);
182 i = lockedAddrList.erase(i);
183 }
184 else {
185 // no match: advance to next record
186 ++i;
187 }
188 }
189
190 if (isLocked) {
191 req->setExtraData(success ? 1 : 0);
192 }
193
194 return success;
195}
196
197void
198PhysicalMemory::doFunctionalAccess(PacketPtr pkt)
199{
200 assert(pkt->getAddr() >= start() &&
201 pkt->getAddr() + pkt->getSize() <= start() + size());
202
203 if (pkt->isRead()) {
204 if (pkt->req->isLocked()) {
205 trackLoadLocked(pkt->req);
206 }
207 memcpy(pkt->getPtr<uint8_t>(), pmemAddr + pkt->getAddr() - start(),
208 pkt->getSize());
209#if TRACING_ON
210 switch (pkt->getSize()) {
211 case sizeof(uint64_t):
212 DPRINTF(MemoryAccess, "Read of size %i on address 0x%x data 0x%x\n",
213 pkt->getSize(), pkt->getAddr(),pkt->get<uint64_t>());
214 break;
215 case sizeof(uint32_t):
216 DPRINTF(MemoryAccess, "Read of size %i on address 0x%x data 0x%x\n",
217 pkt->getSize(), pkt->getAddr(),pkt->get<uint32_t>());
218 break;
219 case sizeof(uint16_t):
220 DPRINTF(MemoryAccess, "Read of size %i on address 0x%x data 0x%x\n",
221 pkt->getSize(), pkt->getAddr(),pkt->get<uint16_t>());
222 break;
223 case sizeof(uint8_t):
224 DPRINTF(MemoryAccess, "Read of size %i on address 0x%x data 0x%x\n",
225 pkt->getSize(), pkt->getAddr(),pkt->get<uint8_t>());
226 break;
227 default:
228 DPRINTF(MemoryAccess, "Read of size %i on address 0x%x\n",
229 pkt->getSize(), pkt->getAddr());
230 }
231#endif
232 }
233 else if (pkt->isWrite()) {
234 if (writeOK(pkt->req)) {
235 memcpy(pmemAddr + pkt->getAddr() - start(), pkt->getPtr<uint8_t>(),
236 pkt->getSize());
237#if TRACING_ON
238 switch (pkt->getSize()) {
239 case sizeof(uint64_t):
240 DPRINTF(MemoryAccess, "Write of size %i on address 0x%x data 0x%x\n",
241 pkt->getSize(), pkt->getAddr(),pkt->get<uint64_t>());
242 break;
243 case sizeof(uint32_t):
244 DPRINTF(MemoryAccess, "Write of size %i on address 0x%x data 0x%x\n",
245 pkt->getSize(), pkt->getAddr(),pkt->get<uint32_t>());
246 break;
247 case sizeof(uint16_t):
248 DPRINTF(MemoryAccess, "Write of size %i on address 0x%x data 0x%x\n",
249 pkt->getSize(), pkt->getAddr(),pkt->get<uint16_t>());
250 break;
251 case sizeof(uint8_t):
252 DPRINTF(MemoryAccess, "Write of size %i on address 0x%x data 0x%x\n",
253 pkt->getSize(), pkt->getAddr(),pkt->get<uint8_t>());
254 break;
255 default:
256 DPRINTF(MemoryAccess, "Write of size %i on address 0x%x\n",
257 pkt->getSize(), pkt->getAddr());
258 }
259#endif
260 }
261 } else if (pkt->isInvalidate()) {
262 //upgrade or invalidate
263 pkt->flags |= SATISFIED;
264 } else if (pkt->isReadWrite()) {
265 IntReg overwrite_val;
266 bool overwrite_mem;
267 uint64_t condition_val64;
268 uint32_t condition_val32;
269
270 assert(sizeof(IntReg) >= pkt->getSize());
271
272 overwrite_mem = true;
273 // keep a copy of our possible write value, and copy what is at the
274 // memory address into the packet
275 std::memcpy(&overwrite_val, pkt->getPtr<uint8_t>(), pkt->getSize());
276 std::memcpy(pkt->getPtr<uint8_t>(), pmemAddr + pkt->getAddr() - start(),
277 pkt->getSize());
278
279 if (pkt->req->isCondSwap()) {
280 if (pkt->getSize() == sizeof(uint64_t)) {
281 condition_val64 = pkt->req->getExtraData();
282 overwrite_mem = !std::memcmp(&condition_val64, pmemAddr +
283 pkt->getAddr() - start(), sizeof(uint64_t));
284 } else if (pkt->getSize() == sizeof(uint32_t)) {
285 condition_val32 = (uint32_t)pkt->req->getExtraData();
286 overwrite_mem = !std::memcmp(&condition_val32, pmemAddr +
287 pkt->getAddr() - start(), sizeof(uint32_t));
288 } else
289 panic("Invalid size for conditional read/write\n");
290 }
291
292 if (overwrite_mem)
293 std::memcpy(pmemAddr + pkt->getAddr() - start(),
294 &overwrite_val, pkt->getSize());
295
296#if TRACING_ON
297 switch (pkt->getSize()) {
298 case sizeof(uint64_t):
299 DPRINTF(MemoryAccess, "Read/Write of size %i on address 0x%x old data 0x%x\n",
300 pkt->getSize(), pkt->getAddr(),pkt->get<uint64_t>());
301 DPRINTF(MemoryAccess, "New Data 0x%x %s conditional (0x%x) and %s \n",
302 overwrite_mem, pkt->req->isCondSwap() ? "was" : "wasn't",
303 condition_val64, overwrite_mem ? "happened" : "didn't happen");
304 break;
305 case sizeof(uint32_t):
306 DPRINTF(MemoryAccess, "Read/Write of size %i on address 0x%x old data 0x%x\n",
307 pkt->getSize(), pkt->getAddr(),pkt->get<uint32_t>());
308 DPRINTF(MemoryAccess, "New Data 0x%x %s conditional (0x%x) and %s \n",
309 overwrite_mem, pkt->req->isCondSwap() ? "was" : "wasn't",
310 condition_val32, overwrite_mem ? "happened" : "didn't happen");
311 break;
312 case sizeof(uint16_t):
313 DPRINTF(MemoryAccess, "Read/Write of size %i on address 0x%x old data 0x%x\n",
314 pkt->getSize(), pkt->getAddr(),pkt->get<uint16_t>());
315 DPRINTF(MemoryAccess, "New Data 0x%x wasn't conditional and happned\n",
316 overwrite_mem);
317 break;
318 case sizeof(uint8_t):
319 DPRINTF(MemoryAccess, "Read/Write of size %i on address 0x%x old data 0x%x\n",
320 pkt->getSize(), pkt->getAddr(),pkt->get<uint8_t>());
321 DPRINTF(MemoryAccess, "New Data 0x%x wasn't conditional and happned\n",
322 overwrite_mem);
323 break;
324 default:
325 DPRINTF(MemoryAccess, "Read/Write of size %i on address 0x%x\n",
326 pkt->getSize(), pkt->getAddr());
327 }
328#endif
329 } else {
330 panic("unimplemented");
331 }
332
333 pkt->result = Packet::Success;
334}
335
336Port *
337PhysicalMemory::getPort(const std::string &if_name, int idx)
338{
339 // Accept request for "functional" port for backwards compatibility
340 // with places where this function is called from C++. I'd prefer
341 // to move all these into Python someday.
342 if (if_name == "functional") {
343 return new MemoryPort(csprintf("%s-functional", name()), this);
344 }
345
346 if (if_name != "port") {
347 panic("PhysicalMemory::getPort: unknown port %s requested", if_name);
348 }
349
350 if (idx >= ports.size()) {
351 ports.resize(idx+1);
352 }
353
354 if (ports[idx] != NULL) {
355 panic("PhysicalMemory::getPort: port %d already assigned", idx);
356 }
357
358 MemoryPort *port =
359 new MemoryPort(csprintf("%s-port%d", name(), idx), this);
360
361 ports[idx] = port;
362 return port;
363}
364
365
366void
367PhysicalMemory::recvStatusChange(Port::Status status)
368{
369}
370
371PhysicalMemory::MemoryPort::MemoryPort(const std::string &_name,
372 PhysicalMemory *_memory)
373 : SimpleTimingPort(_name), memory(_memory)
374{ }
375
376void
377PhysicalMemory::MemoryPort::recvStatusChange(Port::Status status)
378{
379 memory->recvStatusChange(status);
380}
381
382void
383PhysicalMemory::MemoryPort::getDeviceAddressRanges(AddrRangeList &resp,
384 AddrRangeList &snoop)
385{
386 memory->getAddressRanges(resp, snoop);
387}
388
389void
390PhysicalMemory::getAddressRanges(AddrRangeList &resp, AddrRangeList &snoop)
391{
392 snoop.clear();
393 resp.clear();
394 resp.push_back(RangeSize(start(),
395 params()->addrRange.size()));
396}
397
398int
399PhysicalMemory::MemoryPort::deviceBlockSize()
400{
401 return memory->deviceBlockSize();
402}
403
404Tick
405PhysicalMemory::MemoryPort::recvAtomic(PacketPtr pkt)
406{
407 memory->doFunctionalAccess(pkt);
408 return memory->calculateLatency(pkt);
409}
410
411void
412PhysicalMemory::MemoryPort::recvFunctional(PacketPtr pkt)
413{
414 //Since we are overriding the function, make sure to have the impl of the
415 //check or functional accesses here.
416 std::list<std::pair<Tick,PacketPtr> >::iterator i = transmitList.begin();
417 std::list<std::pair<Tick,PacketPtr> >::iterator end = transmitList.end();
418 bool notDone = true;
419
420 while (i != end && notDone) {
421 PacketPtr target = i->second;
422 // If the target contains data, and it overlaps the
423 // probed request, need to update data
424 if (target->intersect(pkt))
425 notDone = fixPacket(pkt, target);
426 i++;
427 }
428
429 // Default implementation of SimpleTimingPort::recvFunctional()
430 // calls recvAtomic() and throws away the latency; we can save a
431 // little here by just not calculating the latency.
432 memory->doFunctionalAccess(pkt);
433}
434
435unsigned int
436PhysicalMemory::drain(Event *de)
437{
438 int count = 0;
439 for (PortIterator pi = ports.begin(); pi != ports.end(); ++pi) {
440 count += (*pi)->drain(de);
441 }
442
443 if (count)
444 changeState(Draining);
445 else
446 changeState(Drained);
447 return count;
448}
449
450void
451PhysicalMemory::serialize(ostream &os)
452{
453 gzFile compressedMem;
454 string filename = name() + ".physmem";
455
456 SERIALIZE_SCALAR(filename);
457
458 // write memory file
459 string thefile = Checkpoint::dir() + "/" + filename.c_str();
460 int fd = creat(thefile.c_str(), 0664);
461 if (fd < 0) {
462 perror("creat");
463 fatal("Can't open physical memory checkpoint file '%s'\n", filename);
464 }
465
466 compressedMem = gzdopen(fd, "wb");
467 if (compressedMem == NULL)
468 fatal("Insufficient memory to allocate compression state for %s\n",
469 filename);
470
471 if (gzwrite(compressedMem, pmemAddr, params()->addrRange.size()) != params()->addrRange.size()) {
472 fatal("Write failed on physical memory checkpoint file '%s'\n",
473 filename);
474 }
475
476 if (gzclose(compressedMem))
477 fatal("Close failed on physical memory checkpoint file '%s'\n",
478 filename);
479}
480
481void
482PhysicalMemory::unserialize(Checkpoint *cp, const string §ion)
483{
484 gzFile compressedMem;
485 long *tempPage;
486 long *pmem_current;
487 uint64_t curSize;
488 uint32_t bytesRead;
489 const int chunkSize = 16384;
490
491
492 string filename;
493
494 UNSERIALIZE_SCALAR(filename);
495
496 filename = cp->cptDir + "/" + filename;
497
498 // mmap memoryfile
499 int fd = open(filename.c_str(), O_RDONLY);
500 if (fd < 0) {
501 perror("open");
502 fatal("Can't open physical memory checkpoint file '%s'", filename);
503 }
504
505 compressedMem = gzdopen(fd, "rb");
506 if (compressedMem == NULL)
507 fatal("Insufficient memory to allocate compression state for %s\n",
508 filename);
509
510 // unmap file that was mmaped in the constructor
511 // This is done here to make sure that gzip and open don't muck with our
512 // nice large space of memory before we reallocate it
513 munmap((char*)pmemAddr, params()->addrRange.size());
514
515 pmemAddr = (uint8_t *)mmap(NULL, params()->addrRange.size(), PROT_READ | PROT_WRITE,
516 MAP_ANON | MAP_PRIVATE, -1, 0);
517
518 if (pmemAddr == (void *)MAP_FAILED) {
519 perror("mmap");
520 fatal("Could not mmap physical memory!\n");
521 }
522
523 curSize = 0;
524 tempPage = (long*)malloc(chunkSize);
525 if (tempPage == NULL)
526 fatal("Unable to malloc memory to read file %s\n", filename);
527
528 /* Only copy bytes that are non-zero, so we don't give the VM system hell */
529 while (curSize < params()->addrRange.size()) {
530 bytesRead = gzread(compressedMem, tempPage, chunkSize);
531 if (bytesRead != chunkSize && bytesRead != params()->addrRange.size() - curSize)
532 fatal("Read failed on physical memory checkpoint file '%s'"
533 " got %d bytes, expected %d or %d bytes\n",
534 filename, bytesRead, chunkSize, params()->addrRange.size()-curSize);
535
536 assert(bytesRead % sizeof(long) == 0);
537
538 for (int x = 0; x < bytesRead/sizeof(long); x++)
539 {
540 if (*(tempPage+x) != 0) {
541 pmem_current = (long*)(pmemAddr + curSize + x * sizeof(long));
542 *pmem_current = *(tempPage+x);
543 }
544 }
545 curSize += bytesRead;
546 }
547
548 free(tempPage);
549
550 if (gzclose(compressedMem))
551 fatal("Close failed on physical memory checkpoint file '%s'\n",
552 filename);
553
554}
555
556
557BEGIN_DECLARE_SIM_OBJECT_PARAMS(PhysicalMemory)
558
559 Param<string> file;
560 Param<Range<Addr> > range;
561 Param<Tick> latency;
562 Param<bool> zero;
563
564END_DECLARE_SIM_OBJECT_PARAMS(PhysicalMemory)
565
566BEGIN_INIT_SIM_OBJECT_PARAMS(PhysicalMemory)
567
568 INIT_PARAM_DFLT(file, "memory mapped file", ""),
569 INIT_PARAM(range, "Device Address Range"),
570 INIT_PARAM(latency, "Memory access latency"),
571 INIT_PARAM(zero, "Zero initialize memory")
572
573END_INIT_SIM_OBJECT_PARAMS(PhysicalMemory)
574
575CREATE_SIM_OBJECT(PhysicalMemory)
576{
577 PhysicalMemory::Params *p = new PhysicalMemory::Params;
578 p->name = getInstanceName();
579 p->addrRange = range;
580 p->latency = latency;
581 p->zero = zero;
582 return new PhysicalMemory(p);
583}
584
585REGISTER_SIM_OBJECT("PhysicalMemory", PhysicalMemory)
| 83 for (PortIterator pi = ports.begin(); pi != ports.end(); ++pi) {
84 if (*pi)
85 (*pi)->sendStatusChange(Port::RangeChange);
86 }
87}
88
89PhysicalMemory::~PhysicalMemory()
90{
91 if (pmemAddr)
92 munmap((char*)pmemAddr, params()->addrRange.size());
93 //Remove memPorts?
94}
95
96Addr
97PhysicalMemory::new_page()
98{
99 Addr return_addr = pagePtr << LogVMPageSize;
100 return_addr += start();
101
102 ++pagePtr;
103 return return_addr;
104}
105
106int
107PhysicalMemory::deviceBlockSize()
108{
109 //Can accept anysize request
110 return 0;
111}
112
113Tick
114PhysicalMemory::calculateLatency(PacketPtr pkt)
115{
116 return lat;
117}
118
119
120
121// Add load-locked to tracking list. Should only be called if the
122// operation is a load and the LOCKED flag is set.
123void
124PhysicalMemory::trackLoadLocked(Request *req)
125{
126 Addr paddr = LockedAddr::mask(req->getPaddr());
127
128 // first we check if we already have a locked addr for this
129 // xc. Since each xc only gets one, we just update the
130 // existing record with the new address.
131 list<LockedAddr>::iterator i;
132
133 for (i = lockedAddrList.begin(); i != lockedAddrList.end(); ++i) {
134 if (i->matchesContext(req)) {
135 DPRINTF(LLSC, "Modifying lock record: cpu %d thread %d addr %#x\n",
136 req->getCpuNum(), req->getThreadNum(), paddr);
137 i->addr = paddr;
138 return;
139 }
140 }
141
142 // no record for this xc: need to allocate a new one
143 DPRINTF(LLSC, "Adding lock record: cpu %d thread %d addr %#x\n",
144 req->getCpuNum(), req->getThreadNum(), paddr);
145 lockedAddrList.push_front(LockedAddr(req));
146}
147
148
149// Called on *writes* only... both regular stores and
150// store-conditional operations. Check for conventional stores which
151// conflict with locked addresses, and for success/failure of store
152// conditionals.
153bool
154PhysicalMemory::checkLockedAddrList(Request *req)
155{
156 Addr paddr = LockedAddr::mask(req->getPaddr());
157 bool isLocked = req->isLocked();
158
159 // Initialize return value. Non-conditional stores always
160 // succeed. Assume conditional stores will fail until proven
161 // otherwise.
162 bool success = !isLocked;
163
164 // Iterate over list. Note that there could be multiple matching
165 // records, as more than one context could have done a load locked
166 // to this location.
167 list<LockedAddr>::iterator i = lockedAddrList.begin();
168
169 while (i != lockedAddrList.end()) {
170
171 if (i->addr == paddr) {
172 // we have a matching address
173
174 if (isLocked && i->matchesContext(req)) {
175 // it's a store conditional, and as far as the memory
176 // system can tell, the requesting context's lock is
177 // still valid.
178 DPRINTF(LLSC, "StCond success: cpu %d thread %d addr %#x\n",
179 req->getCpuNum(), req->getThreadNum(), paddr);
180 success = true;
181 }
182
183 // Get rid of our record of this lock and advance to next
184 DPRINTF(LLSC, "Erasing lock record: cpu %d thread %d addr %#x\n",
185 i->cpuNum, i->threadNum, paddr);
186 i = lockedAddrList.erase(i);
187 }
188 else {
189 // no match: advance to next record
190 ++i;
191 }
192 }
193
194 if (isLocked) {
195 req->setExtraData(success ? 1 : 0);
196 }
197
198 return success;
199}
200
201void
202PhysicalMemory::doFunctionalAccess(PacketPtr pkt)
203{
204 assert(pkt->getAddr() >= start() &&
205 pkt->getAddr() + pkt->getSize() <= start() + size());
206
207 if (pkt->isRead()) {
208 if (pkt->req->isLocked()) {
209 trackLoadLocked(pkt->req);
210 }
211 memcpy(pkt->getPtr<uint8_t>(), pmemAddr + pkt->getAddr() - start(),
212 pkt->getSize());
213#if TRACING_ON
214 switch (pkt->getSize()) {
215 case sizeof(uint64_t):
216 DPRINTF(MemoryAccess, "Read of size %i on address 0x%x data 0x%x\n",
217 pkt->getSize(), pkt->getAddr(),pkt->get<uint64_t>());
218 break;
219 case sizeof(uint32_t):
220 DPRINTF(MemoryAccess, "Read of size %i on address 0x%x data 0x%x\n",
221 pkt->getSize(), pkt->getAddr(),pkt->get<uint32_t>());
222 break;
223 case sizeof(uint16_t):
224 DPRINTF(MemoryAccess, "Read of size %i on address 0x%x data 0x%x\n",
225 pkt->getSize(), pkt->getAddr(),pkt->get<uint16_t>());
226 break;
227 case sizeof(uint8_t):
228 DPRINTF(MemoryAccess, "Read of size %i on address 0x%x data 0x%x\n",
229 pkt->getSize(), pkt->getAddr(),pkt->get<uint8_t>());
230 break;
231 default:
232 DPRINTF(MemoryAccess, "Read of size %i on address 0x%x\n",
233 pkt->getSize(), pkt->getAddr());
234 }
235#endif
236 }
237 else if (pkt->isWrite()) {
238 if (writeOK(pkt->req)) {
239 memcpy(pmemAddr + pkt->getAddr() - start(), pkt->getPtr<uint8_t>(),
240 pkt->getSize());
241#if TRACING_ON
242 switch (pkt->getSize()) {
243 case sizeof(uint64_t):
244 DPRINTF(MemoryAccess, "Write of size %i on address 0x%x data 0x%x\n",
245 pkt->getSize(), pkt->getAddr(),pkt->get<uint64_t>());
246 break;
247 case sizeof(uint32_t):
248 DPRINTF(MemoryAccess, "Write of size %i on address 0x%x data 0x%x\n",
249 pkt->getSize(), pkt->getAddr(),pkt->get<uint32_t>());
250 break;
251 case sizeof(uint16_t):
252 DPRINTF(MemoryAccess, "Write of size %i on address 0x%x data 0x%x\n",
253 pkt->getSize(), pkt->getAddr(),pkt->get<uint16_t>());
254 break;
255 case sizeof(uint8_t):
256 DPRINTF(MemoryAccess, "Write of size %i on address 0x%x data 0x%x\n",
257 pkt->getSize(), pkt->getAddr(),pkt->get<uint8_t>());
258 break;
259 default:
260 DPRINTF(MemoryAccess, "Write of size %i on address 0x%x\n",
261 pkt->getSize(), pkt->getAddr());
262 }
263#endif
264 }
265 } else if (pkt->isInvalidate()) {
266 //upgrade or invalidate
267 pkt->flags |= SATISFIED;
268 } else if (pkt->isReadWrite()) {
269 IntReg overwrite_val;
270 bool overwrite_mem;
271 uint64_t condition_val64;
272 uint32_t condition_val32;
273
274 assert(sizeof(IntReg) >= pkt->getSize());
275
276 overwrite_mem = true;
277 // keep a copy of our possible write value, and copy what is at the
278 // memory address into the packet
279 std::memcpy(&overwrite_val, pkt->getPtr<uint8_t>(), pkt->getSize());
280 std::memcpy(pkt->getPtr<uint8_t>(), pmemAddr + pkt->getAddr() - start(),
281 pkt->getSize());
282
283 if (pkt->req->isCondSwap()) {
284 if (pkt->getSize() == sizeof(uint64_t)) {
285 condition_val64 = pkt->req->getExtraData();
286 overwrite_mem = !std::memcmp(&condition_val64, pmemAddr +
287 pkt->getAddr() - start(), sizeof(uint64_t));
288 } else if (pkt->getSize() == sizeof(uint32_t)) {
289 condition_val32 = (uint32_t)pkt->req->getExtraData();
290 overwrite_mem = !std::memcmp(&condition_val32, pmemAddr +
291 pkt->getAddr() - start(), sizeof(uint32_t));
292 } else
293 panic("Invalid size for conditional read/write\n");
294 }
295
296 if (overwrite_mem)
297 std::memcpy(pmemAddr + pkt->getAddr() - start(),
298 &overwrite_val, pkt->getSize());
299
300#if TRACING_ON
301 switch (pkt->getSize()) {
302 case sizeof(uint64_t):
303 DPRINTF(MemoryAccess, "Read/Write of size %i on address 0x%x old data 0x%x\n",
304 pkt->getSize(), pkt->getAddr(),pkt->get<uint64_t>());
305 DPRINTF(MemoryAccess, "New Data 0x%x %s conditional (0x%x) and %s \n",
306 overwrite_mem, pkt->req->isCondSwap() ? "was" : "wasn't",
307 condition_val64, overwrite_mem ? "happened" : "didn't happen");
308 break;
309 case sizeof(uint32_t):
310 DPRINTF(MemoryAccess, "Read/Write of size %i on address 0x%x old data 0x%x\n",
311 pkt->getSize(), pkt->getAddr(),pkt->get<uint32_t>());
312 DPRINTF(MemoryAccess, "New Data 0x%x %s conditional (0x%x) and %s \n",
313 overwrite_mem, pkt->req->isCondSwap() ? "was" : "wasn't",
314 condition_val32, overwrite_mem ? "happened" : "didn't happen");
315 break;
316 case sizeof(uint16_t):
317 DPRINTF(MemoryAccess, "Read/Write of size %i on address 0x%x old data 0x%x\n",
318 pkt->getSize(), pkt->getAddr(),pkt->get<uint16_t>());
319 DPRINTF(MemoryAccess, "New Data 0x%x wasn't conditional and happned\n",
320 overwrite_mem);
321 break;
322 case sizeof(uint8_t):
323 DPRINTF(MemoryAccess, "Read/Write of size %i on address 0x%x old data 0x%x\n",
324 pkt->getSize(), pkt->getAddr(),pkt->get<uint8_t>());
325 DPRINTF(MemoryAccess, "New Data 0x%x wasn't conditional and happned\n",
326 overwrite_mem);
327 break;
328 default:
329 DPRINTF(MemoryAccess, "Read/Write of size %i on address 0x%x\n",
330 pkt->getSize(), pkt->getAddr());
331 }
332#endif
333 } else {
334 panic("unimplemented");
335 }
336
337 pkt->result = Packet::Success;
338}
339
340Port *
341PhysicalMemory::getPort(const std::string &if_name, int idx)
342{
343 // Accept request for "functional" port for backwards compatibility
344 // with places where this function is called from C++. I'd prefer
345 // to move all these into Python someday.
346 if (if_name == "functional") {
347 return new MemoryPort(csprintf("%s-functional", name()), this);
348 }
349
350 if (if_name != "port") {
351 panic("PhysicalMemory::getPort: unknown port %s requested", if_name);
352 }
353
354 if (idx >= ports.size()) {
355 ports.resize(idx+1);
356 }
357
358 if (ports[idx] != NULL) {
359 panic("PhysicalMemory::getPort: port %d already assigned", idx);
360 }
361
362 MemoryPort *port =
363 new MemoryPort(csprintf("%s-port%d", name(), idx), this);
364
365 ports[idx] = port;
366 return port;
367}
368
369
370void
371PhysicalMemory::recvStatusChange(Port::Status status)
372{
373}
374
375PhysicalMemory::MemoryPort::MemoryPort(const std::string &_name,
376 PhysicalMemory *_memory)
377 : SimpleTimingPort(_name), memory(_memory)
378{ }
379
380void
381PhysicalMemory::MemoryPort::recvStatusChange(Port::Status status)
382{
383 memory->recvStatusChange(status);
384}
385
386void
387PhysicalMemory::MemoryPort::getDeviceAddressRanges(AddrRangeList &resp,
388 AddrRangeList &snoop)
389{
390 memory->getAddressRanges(resp, snoop);
391}
392
393void
394PhysicalMemory::getAddressRanges(AddrRangeList &resp, AddrRangeList &snoop)
395{
396 snoop.clear();
397 resp.clear();
398 resp.push_back(RangeSize(start(),
399 params()->addrRange.size()));
400}
401
402int
403PhysicalMemory::MemoryPort::deviceBlockSize()
404{
405 return memory->deviceBlockSize();
406}
407
408Tick
409PhysicalMemory::MemoryPort::recvAtomic(PacketPtr pkt)
410{
411 memory->doFunctionalAccess(pkt);
412 return memory->calculateLatency(pkt);
413}
414
415void
416PhysicalMemory::MemoryPort::recvFunctional(PacketPtr pkt)
417{
418 //Since we are overriding the function, make sure to have the impl of the
419 //check or functional accesses here.
420 std::list<std::pair<Tick,PacketPtr> >::iterator i = transmitList.begin();
421 std::list<std::pair<Tick,PacketPtr> >::iterator end = transmitList.end();
422 bool notDone = true;
423
424 while (i != end && notDone) {
425 PacketPtr target = i->second;
426 // If the target contains data, and it overlaps the
427 // probed request, need to update data
428 if (target->intersect(pkt))
429 notDone = fixPacket(pkt, target);
430 i++;
431 }
432
433 // Default implementation of SimpleTimingPort::recvFunctional()
434 // calls recvAtomic() and throws away the latency; we can save a
435 // little here by just not calculating the latency.
436 memory->doFunctionalAccess(pkt);
437}
438
439unsigned int
440PhysicalMemory::drain(Event *de)
441{
442 int count = 0;
443 for (PortIterator pi = ports.begin(); pi != ports.end(); ++pi) {
444 count += (*pi)->drain(de);
445 }
446
447 if (count)
448 changeState(Draining);
449 else
450 changeState(Drained);
451 return count;
452}
453
454void
455PhysicalMemory::serialize(ostream &os)
456{
457 gzFile compressedMem;
458 string filename = name() + ".physmem";
459
460 SERIALIZE_SCALAR(filename);
461
462 // write memory file
463 string thefile = Checkpoint::dir() + "/" + filename.c_str();
464 int fd = creat(thefile.c_str(), 0664);
465 if (fd < 0) {
466 perror("creat");
467 fatal("Can't open physical memory checkpoint file '%s'\n", filename);
468 }
469
470 compressedMem = gzdopen(fd, "wb");
471 if (compressedMem == NULL)
472 fatal("Insufficient memory to allocate compression state for %s\n",
473 filename);
474
475 if (gzwrite(compressedMem, pmemAddr, params()->addrRange.size()) != params()->addrRange.size()) {
476 fatal("Write failed on physical memory checkpoint file '%s'\n",
477 filename);
478 }
479
480 if (gzclose(compressedMem))
481 fatal("Close failed on physical memory checkpoint file '%s'\n",
482 filename);
483}
484
485void
486PhysicalMemory::unserialize(Checkpoint *cp, const string §ion)
487{
488 gzFile compressedMem;
489 long *tempPage;
490 long *pmem_current;
491 uint64_t curSize;
492 uint32_t bytesRead;
493 const int chunkSize = 16384;
494
495
496 string filename;
497
498 UNSERIALIZE_SCALAR(filename);
499
500 filename = cp->cptDir + "/" + filename;
501
502 // mmap memoryfile
503 int fd = open(filename.c_str(), O_RDONLY);
504 if (fd < 0) {
505 perror("open");
506 fatal("Can't open physical memory checkpoint file '%s'", filename);
507 }
508
509 compressedMem = gzdopen(fd, "rb");
510 if (compressedMem == NULL)
511 fatal("Insufficient memory to allocate compression state for %s\n",
512 filename);
513
514 // unmap file that was mmaped in the constructor
515 // This is done here to make sure that gzip and open don't muck with our
516 // nice large space of memory before we reallocate it
517 munmap((char*)pmemAddr, params()->addrRange.size());
518
519 pmemAddr = (uint8_t *)mmap(NULL, params()->addrRange.size(), PROT_READ | PROT_WRITE,
520 MAP_ANON | MAP_PRIVATE, -1, 0);
521
522 if (pmemAddr == (void *)MAP_FAILED) {
523 perror("mmap");
524 fatal("Could not mmap physical memory!\n");
525 }
526
527 curSize = 0;
528 tempPage = (long*)malloc(chunkSize);
529 if (tempPage == NULL)
530 fatal("Unable to malloc memory to read file %s\n", filename);
531
532 /* Only copy bytes that are non-zero, so we don't give the VM system hell */
533 while (curSize < params()->addrRange.size()) {
534 bytesRead = gzread(compressedMem, tempPage, chunkSize);
535 if (bytesRead != chunkSize && bytesRead != params()->addrRange.size() - curSize)
536 fatal("Read failed on physical memory checkpoint file '%s'"
537 " got %d bytes, expected %d or %d bytes\n",
538 filename, bytesRead, chunkSize, params()->addrRange.size()-curSize);
539
540 assert(bytesRead % sizeof(long) == 0);
541
542 for (int x = 0; x < bytesRead/sizeof(long); x++)
543 {
544 if (*(tempPage+x) != 0) {
545 pmem_current = (long*)(pmemAddr + curSize + x * sizeof(long));
546 *pmem_current = *(tempPage+x);
547 }
548 }
549 curSize += bytesRead;
550 }
551
552 free(tempPage);
553
554 if (gzclose(compressedMem))
555 fatal("Close failed on physical memory checkpoint file '%s'\n",
556 filename);
557
558}
559
560
561BEGIN_DECLARE_SIM_OBJECT_PARAMS(PhysicalMemory)
562
563 Param<string> file;
564 Param<Range<Addr> > range;
565 Param<Tick> latency;
566 Param<bool> zero;
567
568END_DECLARE_SIM_OBJECT_PARAMS(PhysicalMemory)
569
570BEGIN_INIT_SIM_OBJECT_PARAMS(PhysicalMemory)
571
572 INIT_PARAM_DFLT(file, "memory mapped file", ""),
573 INIT_PARAM(range, "Device Address Range"),
574 INIT_PARAM(latency, "Memory access latency"),
575 INIT_PARAM(zero, "Zero initialize memory")
576
577END_INIT_SIM_OBJECT_PARAMS(PhysicalMemory)
578
579CREATE_SIM_OBJECT(PhysicalMemory)
580{
581 PhysicalMemory::Params *p = new PhysicalMemory::Params;
582 p->name = getInstanceName();
583 p->addrRange = range;
584 p->latency = latency;
585 p->zero = zero;
586 return new PhysicalMemory(p);
587}
588
589REGISTER_SIM_OBJECT("PhysicalMemory", PhysicalMemory)
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