1/*
2 * Copyright (c) 2012, 2014, 2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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69#endif
70#endif
71
72using namespace std;
73
74PhysicalMemory::PhysicalMemory(const string& _name,
75 const vector<AbstractMemory*>& _memories,
76 bool mmap_using_noreserve) :
77 _name(_name), size(0), mmapUsingNoReserve(mmap_using_noreserve)
78{
79 if (mmap_using_noreserve)
80 warn("Not reserving swap space. May cause SIGSEGV on actual usage\n");
81
82 // add the memories from the system to the address map as
83 // appropriate
84 for (const auto& m : _memories) {
85 // only add the memory if it is part of the global address map

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230 // unmap the backing store
231 for (auto& s : backingStore)
232 munmap((char*)s.pmem, s.range.size());
233}
234
235bool
236PhysicalMemory::isMemAddr(Addr addr) const
237{
238 return addrMap.contains(addr) != addrMap.end();
239}
240
241AddrRangeList
242PhysicalMemory::getConfAddrRanges() const
243{
244 // this could be done once in the constructor, but since it is unlikely to
245 // be called more than once the iteration should not be a problem
246 AddrRangeList ranges;

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274 return ranges;
275}
276
277void
278PhysicalMemory::access(PacketPtr pkt)
279{
280 assert(pkt->isRequest());
281 Addr addr = pkt->getAddr();
282 const auto& m = addrMap.contains(addr);
283 assert(m != addrMap.end());
284 m->second->access(pkt);
285}
286
287void
288PhysicalMemory::functionalAccess(PacketPtr pkt)
289{
290 assert(pkt->isRequest());
291 Addr addr = pkt->getAddr();
292 const auto& m = addrMap.contains(addr);
293 assert(m != addrMap.end());
294 m->second->functionalAccess(pkt);
295}
296
297void
298PhysicalMemory::serialize(CheckpointOut &cp) const
299{
300 // serialize all the locked addresses and their context ids
301 vector<Addr> lal_addr;
302 vector<ContextID> lal_cid;

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