page_table.hh (10298:77af86f37337) | page_table.hh (10318:98771a936b61) |
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1/* 2 * Copyright (c) 2014 Advanced Micro Devices, Inc. 3 * Copyright (c) 2003 The Regents of The University of Michigan 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 59 unchanged lines hidden (view full) --- 68 const Addr offsetMask; 69 70 const uint64_t pid; 71 const std::string _name; 72 73 public: 74 75 PageTableBase(const std::string &__name, uint64_t _pid, | 1/* 2 * Copyright (c) 2014 Advanced Micro Devices, Inc. 3 * Copyright (c) 2003 The Regents of The University of Michigan 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 59 unchanged lines hidden (view full) --- 68 const Addr offsetMask; 69 70 const uint64_t pid; 71 const std::string _name; 72 73 public: 74 75 PageTableBase(const std::string &__name, uint64_t _pid, |
76 Addr _pageSize = TheISA::VMPageSize) | 76 Addr _pageSize = TheISA::PageBytes) |
77 : pageSize(_pageSize), offsetMask(mask(floorLog2(_pageSize))), 78 pid(_pid), _name(__name) 79 { 80 assert(isPowerOf2(pageSize)); 81 pTableCache[0].valid = false; 82 pTableCache[1].valid = false; 83 pTableCache[2].valid = false; 84 } --- 98 unchanged lines hidden (view full) --- 183 private: 184 typedef m5::hash_map<Addr, TheISA::TlbEntry> PTable; 185 typedef PTable::iterator PTableItr; 186 PTable pTable; 187 188 public: 189 190 FuncPageTable(const std::string &__name, uint64_t _pid, | 77 : pageSize(_pageSize), offsetMask(mask(floorLog2(_pageSize))), 78 pid(_pid), _name(__name) 79 { 80 assert(isPowerOf2(pageSize)); 81 pTableCache[0].valid = false; 82 pTableCache[1].valid = false; 83 pTableCache[2].valid = false; 84 } --- 98 unchanged lines hidden (view full) --- 183 private: 184 typedef m5::hash_map<Addr, TheISA::TlbEntry> PTable; 185 typedef PTable::iterator PTableItr; 186 PTable pTable; 187 188 public: 189 190 FuncPageTable(const std::string &__name, uint64_t _pid, |
191 Addr _pageSize = TheISA::VMPageSize); | 191 Addr _pageSize = TheISA::PageBytes); |
192 193 ~FuncPageTable(); 194 195 void initState(ThreadContext* tc) 196 { 197 } 198 199 void map(Addr vaddr, Addr paddr, int64_t size, bool clobber = false); --- 24 unchanged lines hidden (view full) --- 224 * Faux page table class indended to stop the usage of 225 * an architectural page table, when there is none defined 226 * for a particular ISA. 227 */ 228class NoArchPageTable : public FuncPageTable 229{ 230 public: 231 NoArchPageTable(const std::string &__name, uint64_t _pid, System *_sys, | 192 193 ~FuncPageTable(); 194 195 void initState(ThreadContext* tc) 196 { 197 } 198 199 void map(Addr vaddr, Addr paddr, int64_t size, bool clobber = false); --- 24 unchanged lines hidden (view full) --- 224 * Faux page table class indended to stop the usage of 225 * an architectural page table, when there is none defined 226 * for a particular ISA. 227 */ 228class NoArchPageTable : public FuncPageTable 229{ 230 public: 231 NoArchPageTable(const std::string &__name, uint64_t _pid, System *_sys, |
232 Addr _pageSize = TheISA::VMPageSize) : FuncPageTable(__name, _pid) | 232 Addr _pageSize = TheISA::PageBytes) : FuncPageTable(__name, _pid) |
233 { 234 fatal("No architectural page table defined for this ISA.\n"); 235 } 236}; 237 238#endif // __MEM_PAGE_TABLE_HH__ | 233 { 234 fatal("No architectural page table defined for this ISA.\n"); 235 } 236}; 237 238#endif // __MEM_PAGE_TABLE_HH__ |