page_table.hh (2980:eab855f06b79) | page_table.hh (2982:0ecdb0879b14) |
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1/* 2 * Copyright (c) 2003 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 24 unchanged lines hidden (view full) --- 33 * Declaration of a non-full system Page Table. 34 */ 35 36#ifndef __PAGE_TABLE__ 37#define __PAGE_TABLE__ 38 39#include <string> 40 | 1/* 2 * Copyright (c) 2003 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 24 unchanged lines hidden (view full) --- 33 * Declaration of a non-full system Page Table. 34 */ 35 36#ifndef __PAGE_TABLE__ 37#define __PAGE_TABLE__ 38 39#include <string> 40 |
41#include "sim/faults.hh" | 41#include "arch/faults.hh" |
42#include "arch/isa_traits.hh" 43#include "base/hashmap.hh" 44#include "base/trace.hh" 45#include "mem/request.hh" 46#include "mem/packet.hh" 47#include "sim/sim_object.hh" 48 49class System; 50 51/** | 42#include "arch/isa_traits.hh" 43#include "base/hashmap.hh" 44#include "base/trace.hh" 45#include "mem/request.hh" 46#include "mem/packet.hh" 47#include "sim/sim_object.hh" 48 49class System; 50 51/** |
52 * Page Table Decleration. | 52 * Page Table Declaration. |
53 */ 54class PageTable 55{ 56 protected: 57 m5::hash_map<Addr,Addr> pTable; 58 59 struct cacheElement { 60 Addr paddr; --- 11 unchanged lines hidden (view full) --- 72 73 PageTable(System *_system, Addr _pageSize = TheISA::VMPageSize); 74 75 ~PageTable(); 76 77 Addr pageAlign(Addr a) { return (a & ~offsetMask); } 78 Addr pageOffset(Addr a) { return (a & offsetMask); } 79 | 53 */ 54class PageTable 55{ 56 protected: 57 m5::hash_map<Addr,Addr> pTable; 58 59 struct cacheElement { 60 Addr paddr; --- 11 unchanged lines hidden (view full) --- 72 73 PageTable(System *_system, Addr _pageSize = TheISA::VMPageSize); 74 75 ~PageTable(); 76 77 Addr pageAlign(Addr a) { return (a & ~offsetMask); } 78 Addr pageOffset(Addr a) { return (a & offsetMask); } 79 |
80 Fault page_check(Addr addr, int64_t size) const; | 80 Fault page_check(Addr addr, int size) const; |
81 | 81 |
82 void allocate(Addr vaddr, int64_t size); | 82 void allocate(Addr vaddr, int size); |
83 84 /** 85 * Translate function 86 * @param vaddr The virtual address. 87 * @return Physical address from translation. 88 */ 89 bool translate(Addr vaddr, Addr &paddr); 90 91 /** 92 * Perform a translation on the memory request, fills in paddr 93 * field of mem_req. 94 * @param req The memory request. 95 */ 96 Fault translate(RequestPtr &req); 97 98}; 99 100#endif | 83 84 /** 85 * Translate function 86 * @param vaddr The virtual address. 87 * @return Physical address from translation. 88 */ 89 bool translate(Addr vaddr, Addr &paddr); 90 91 /** 92 * Perform a translation on the memory request, fills in paddr 93 * field of mem_req. 94 * @param req The memory request. 95 */ 96 Fault translate(RequestPtr &req); 97 98}; 99 100#endif |