page_table.cc (8232:b28d06a175be) page_table.cc (8600:b0d7c64ada19)
1/*
2 * Copyright (c) 2003 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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62 pTableCache[2].vaddr = 0;
63}
64
65PageTable::~PageTable()
66{
67}
68
69void
1/*
2 * Copyright (c) 2003 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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62 pTableCache[2].vaddr = 0;
63}
64
65PageTable::~PageTable()
66{
67}
68
69void
70PageTable::allocate(Addr vaddr, int64_t size)
70PageTable::allocate(Addr vaddr, int64_t size, bool clobber)
71{
72 // starting address must be page aligned
73 assert(pageOffset(vaddr) == 0);
74
75 DPRINTF(MMU, "Allocating Page: %#x-%#x\n", vaddr, vaddr+ size);
76
77 for (; size > 0; size -= pageSize, vaddr += pageSize) {
71{
72 // starting address must be page aligned
73 assert(pageOffset(vaddr) == 0);
74
75 DPRINTF(MMU, "Allocating Page: %#x-%#x\n", vaddr, vaddr+ size);
76
77 for (; size > 0; size -= pageSize, vaddr += pageSize) {
78 PTableItr iter = pTable.find(vaddr);
79
80 if (iter != pTable.end()) {
78 if (!clobber && (pTable.find(vaddr) != pTable.end())) {
81 // already mapped
79 // already mapped
82 fatal("PageTable::allocate: address 0x%x already mapped",
83 vaddr);
80 fatal("PageTable::allocate: address 0x%x already mapped", vaddr);
84 }
85
86 pTable[vaddr] = TheISA::TlbEntry(process->M5_pid, vaddr,
81 }
82
83 pTable[vaddr] = TheISA::TlbEntry(process->M5_pid, vaddr,
87 process->system->new_page());
84 process->system->new_page());
88 updateCache(vaddr, pTable[vaddr]);
89 }
90}
91
92void
93PageTable::remap(Addr vaddr, int64_t size, Addr new_vaddr)
94{
95 assert(pageOffset(vaddr) == 0);

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123 assert(iter != pTable.end());
124
125 pTable.erase(vaddr);
126 }
127
128}
129
130bool
85 updateCache(vaddr, pTable[vaddr]);
86 }
87}
88
89void
90PageTable::remap(Addr vaddr, int64_t size, Addr new_vaddr)
91{
92 assert(pageOffset(vaddr) == 0);

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120 assert(iter != pTable.end());
121
122 pTable.erase(vaddr);
123 }
124
125}
126
127bool
128PageTable::isUnmapped(Addr vaddr, int64_t size)
129{
130 // starting address must be page aligned
131 assert(pageOffset(vaddr) == 0);
132
133 for (; size > 0; size -= pageSize, vaddr += pageSize) {
134 if (pTable.find(vaddr) != pTable.end()) {
135 return false;
136 }
137 }
138
139 return true;
140}
141
142bool
131PageTable::lookup(Addr vaddr, TheISA::TlbEntry &entry)
132{
133 Addr page_addr = pageAlign(vaddr);
134
135 if (pTableCache[0].vaddr == page_addr) {
136 entry = pTableCache[0].entry;
137 return true;
138 }

--- 90 unchanged lines hidden --- 		143PageTable::lookup(Addr vaddr, TheISA::TlbEntry &entry)
144{
145 Addr page_addr = pageAlign(vaddr);
146
147 if (pTableCache[0].vaddr == page_addr) {
148 entry = pTableCache[0].entry;
149 return true;
150 }

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