1/*
2 * Copyright (c) 2003 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Steve Reinhardt
29 * Ron Dreslinski
30 * Ali Saidi
31 */
32
33/**
34 * @file
35 * Definitions of page table.
36 */
37#include <fstream>
38#include <map>
39#include <string>
40
41#include "base/bitfield.hh"
42#include "base/intmath.hh"
43#include "base/trace.hh"
44#include "config/the_isa.hh"
45#include "debug/MMU.hh"
46#include "mem/page_table.hh"
47#include "sim/faults.hh"
48#include "sim/sim_object.hh"
49
50using namespace std;
51using namespace TheISA;
52
53PageTable::PageTable(const std::string &__name, uint64_t _pid, Addr _pageSize)
54 : pageSize(_pageSize), offsetMask(mask(floorLog2(_pageSize))),
55 pid(_pid), _name(__name)
56{
57 assert(isPowerOf2(pageSize));
58 pTableCache[0].vaddr = 0;
59 pTableCache[1].vaddr = 0;
60 pTableCache[2].vaddr = 0;
61}
62
63PageTable::~PageTable()
64{
65}
66
67void
68PageTable::map(Addr vaddr, Addr paddr, int64_t size, bool clobber)
69{
70 // starting address must be page aligned
71 assert(pageOffset(vaddr) == 0);
72
73 DPRINTF(MMU, "Allocating Page: %#x-%#x\n", vaddr, vaddr+ size);
74
75 for (; size > 0; size -= pageSize, vaddr += pageSize, paddr += pageSize) {
76 if (!clobber && (pTable.find(vaddr) != pTable.end())) {
77 // already mapped
78 fatal("PageTable::allocate: address 0x%x already mapped", vaddr);
79 }
80
81 pTable[vaddr] = TheISA::TlbEntry(pid, vaddr, paddr);
82 updateCache(vaddr, pTable[vaddr]);
83 }
84}
85
86void
87PageTable::remap(Addr vaddr, int64_t size, Addr new_vaddr)
88{
89 assert(pageOffset(vaddr) == 0);
90 assert(pageOffset(new_vaddr) == 0);
91
92 DPRINTF(MMU, "moving pages from vaddr %08p to %08p, size = %d\n", vaddr,
93 new_vaddr, size);
94
95 for (; size > 0; size -= pageSize, vaddr += pageSize, new_vaddr += pageSize) {
| 1/*
2 * Copyright (c) 2003 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Steve Reinhardt
29 * Ron Dreslinski
30 * Ali Saidi
31 */
32
33/**
34 * @file
35 * Definitions of page table.
36 */
37#include <fstream>
38#include <map>
39#include <string>
40
41#include "base/bitfield.hh"
42#include "base/intmath.hh"
43#include "base/trace.hh"
44#include "config/the_isa.hh"
45#include "debug/MMU.hh"
46#include "mem/page_table.hh"
47#include "sim/faults.hh"
48#include "sim/sim_object.hh"
49
50using namespace std;
51using namespace TheISA;
52
53PageTable::PageTable(const std::string &__name, uint64_t _pid, Addr _pageSize)
54 : pageSize(_pageSize), offsetMask(mask(floorLog2(_pageSize))),
55 pid(_pid), _name(__name)
56{
57 assert(isPowerOf2(pageSize));
58 pTableCache[0].vaddr = 0;
59 pTableCache[1].vaddr = 0;
60 pTableCache[2].vaddr = 0;
61}
62
63PageTable::~PageTable()
64{
65}
66
67void
68PageTable::map(Addr vaddr, Addr paddr, int64_t size, bool clobber)
69{
70 // starting address must be page aligned
71 assert(pageOffset(vaddr) == 0);
72
73 DPRINTF(MMU, "Allocating Page: %#x-%#x\n", vaddr, vaddr+ size);
74
75 for (; size > 0; size -= pageSize, vaddr += pageSize, paddr += pageSize) {
76 if (!clobber && (pTable.find(vaddr) != pTable.end())) {
77 // already mapped
78 fatal("PageTable::allocate: address 0x%x already mapped", vaddr);
79 }
80
81 pTable[vaddr] = TheISA::TlbEntry(pid, vaddr, paddr);
82 updateCache(vaddr, pTable[vaddr]);
83 }
84}
85
86void
87PageTable::remap(Addr vaddr, int64_t size, Addr new_vaddr)
88{
89 assert(pageOffset(vaddr) == 0);
90 assert(pageOffset(new_vaddr) == 0);
91
92 DPRINTF(MMU, "moving pages from vaddr %08p to %08p, size = %d\n", vaddr,
93 new_vaddr, size);
94
95 for (; size > 0; size -= pageSize, vaddr += pageSize, new_vaddr += pageSize) {
|
96 PTableItr iter = pTable.find(vaddr);
| 96 assert(pTable.find(vaddr) != pTable.end());
|
97
| 97
|
98 assert(iter != pTable.end());
99
| |
100 pTable[new_vaddr] = pTable[vaddr];
101 pTable.erase(vaddr);
102 pTable[new_vaddr].updateVaddr(new_vaddr);
103 updateCache(new_vaddr, pTable[new_vaddr]);
104 }
105}
106
107void
108PageTable::unmap(Addr vaddr, int64_t size)
109{
110 assert(pageOffset(vaddr) == 0);
111
112 DPRINTF(MMU, "Unmapping page: %#x-%#x\n", vaddr, vaddr+ size);
113
114 for (; size > 0; size -= pageSize, vaddr += pageSize) {
| 98 pTable[new_vaddr] = pTable[vaddr];
99 pTable.erase(vaddr);
100 pTable[new_vaddr].updateVaddr(new_vaddr);
101 updateCache(new_vaddr, pTable[new_vaddr]);
102 }
103}
104
105void
106PageTable::unmap(Addr vaddr, int64_t size)
107{
108 assert(pageOffset(vaddr) == 0);
109
110 DPRINTF(MMU, "Unmapping page: %#x-%#x\n", vaddr, vaddr+ size);
111
112 for (; size > 0; size -= pageSize, vaddr += pageSize) {
|
115 PTableItr iter = pTable.find(vaddr);
| 113 assert(pTable.find(vaddr) != pTable.end());
|
116
| 114
|
117 assert(iter != pTable.end());
118
| |
119 pTable.erase(vaddr);
120 }
121
122}
123
124bool
125PageTable::isUnmapped(Addr vaddr, int64_t size)
126{
127 // starting address must be page aligned
128 assert(pageOffset(vaddr) == 0);
129
130 for (; size > 0; size -= pageSize, vaddr += pageSize) {
131 if (pTable.find(vaddr) != pTable.end()) {
132 return false;
133 }
134 }
135
136 return true;
137}
138
139bool
140PageTable::lookup(Addr vaddr, TheISA::TlbEntry &entry)
141{
142 Addr page_addr = pageAlign(vaddr);
143
144 if (pTableCache[0].vaddr == page_addr) {
145 entry = pTableCache[0].entry;
146 return true;
147 }
148 if (pTableCache[1].vaddr == page_addr) {
149 entry = pTableCache[1].entry;
150 return true;
151 }
152 if (pTableCache[2].vaddr == page_addr) {
153 entry = pTableCache[2].entry;
154 return true;
155 }
156
157 PTableItr iter = pTable.find(page_addr);
158
159 if (iter == pTable.end()) {
160 return false;
161 }
162
163 updateCache(page_addr, iter->second);
164 entry = iter->second;
165 return true;
166}
167
168bool
169PageTable::translate(Addr vaddr, Addr &paddr)
170{
171 TheISA::TlbEntry entry;
172 if (!lookup(vaddr, entry)) {
173 DPRINTF(MMU, "Couldn't Translate: %#x\n", vaddr);
174 return false;
175 }
176 paddr = pageOffset(vaddr) + entry.pageStart();
177 DPRINTF(MMU, "Translating: %#x->%#x\n", vaddr, paddr);
178 return true;
179}
180
181Fault
182PageTable::translate(RequestPtr req)
183{
184 Addr paddr;
185 assert(pageAlign(req->getVaddr() + req->getSize() - 1)
186 == pageAlign(req->getVaddr()));
187 if (!translate(req->getVaddr(), paddr)) {
188 return Fault(new GenericPageTableFault(req->getVaddr()));
189 }
190 req->setPaddr(paddr);
191 if ((paddr & (pageSize - 1)) + req->getSize() > pageSize) {
192 panic("Request spans page boundaries!\n");
193 return NoFault;
194 }
195 return NoFault;
196}
197
198void
199PageTable::serialize(std::ostream &os)
200{
201 paramOut(os, "ptable.size", pTable.size());
202
203 PTable::size_type count = 0;
204
205 PTableItr iter = pTable.begin();
206 PTableItr end = pTable.end();
207 while (iter != end) {
208 os << "\n[" << csprintf("%s.Entry%d", name(), count) << "]\n";
209
210 paramOut(os, "vaddr", iter->first);
211 iter->second.serialize(os);
212
213 ++iter;
214 ++count;
215 }
216 assert(count == pTable.size());
217}
218
219void
220PageTable::unserialize(Checkpoint *cp, const std::string §ion)
221{
222 int i = 0, count;
223 paramIn(cp, section, "ptable.size", count);
224
225 pTable.clear();
226
227 while (i < count) {
228 TheISA::TlbEntry *entry;
229 Addr vaddr;
230
231 paramIn(cp, csprintf("%s.Entry%d", name(), i), "vaddr", vaddr);
232 entry = new TheISA::TlbEntry();
233 entry->unserialize(cp, csprintf("%s.Entry%d", name(), i));
234 pTable[vaddr] = *entry;
235 ++i;
236 }
237}
238
| 115 pTable.erase(vaddr);
116 }
117
118}
119
120bool
121PageTable::isUnmapped(Addr vaddr, int64_t size)
122{
123 // starting address must be page aligned
124 assert(pageOffset(vaddr) == 0);
125
126 for (; size > 0; size -= pageSize, vaddr += pageSize) {
127 if (pTable.find(vaddr) != pTable.end()) {
128 return false;
129 }
130 }
131
132 return true;
133}
134
135bool
136PageTable::lookup(Addr vaddr, TheISA::TlbEntry &entry)
137{
138 Addr page_addr = pageAlign(vaddr);
139
140 if (pTableCache[0].vaddr == page_addr) {
141 entry = pTableCache[0].entry;
142 return true;
143 }
144 if (pTableCache[1].vaddr == page_addr) {
145 entry = pTableCache[1].entry;
146 return true;
147 }
148 if (pTableCache[2].vaddr == page_addr) {
149 entry = pTableCache[2].entry;
150 return true;
151 }
152
153 PTableItr iter = pTable.find(page_addr);
154
155 if (iter == pTable.end()) {
156 return false;
157 }
158
159 updateCache(page_addr, iter->second);
160 entry = iter->second;
161 return true;
162}
163
164bool
165PageTable::translate(Addr vaddr, Addr &paddr)
166{
167 TheISA::TlbEntry entry;
168 if (!lookup(vaddr, entry)) {
169 DPRINTF(MMU, "Couldn't Translate: %#x\n", vaddr);
170 return false;
171 }
172 paddr = pageOffset(vaddr) + entry.pageStart();
173 DPRINTF(MMU, "Translating: %#x->%#x\n", vaddr, paddr);
174 return true;
175}
176
177Fault
178PageTable::translate(RequestPtr req)
179{
180 Addr paddr;
181 assert(pageAlign(req->getVaddr() + req->getSize() - 1)
182 == pageAlign(req->getVaddr()));
183 if (!translate(req->getVaddr(), paddr)) {
184 return Fault(new GenericPageTableFault(req->getVaddr()));
185 }
186 req->setPaddr(paddr);
187 if ((paddr & (pageSize - 1)) + req->getSize() > pageSize) {
188 panic("Request spans page boundaries!\n");
189 return NoFault;
190 }
191 return NoFault;
192}
193
194void
195PageTable::serialize(std::ostream &os)
196{
197 paramOut(os, "ptable.size", pTable.size());
198
199 PTable::size_type count = 0;
200
201 PTableItr iter = pTable.begin();
202 PTableItr end = pTable.end();
203 while (iter != end) {
204 os << "\n[" << csprintf("%s.Entry%d", name(), count) << "]\n";
205
206 paramOut(os, "vaddr", iter->first);
207 iter->second.serialize(os);
208
209 ++iter;
210 ++count;
211 }
212 assert(count == pTable.size());
213}
214
215void
216PageTable::unserialize(Checkpoint *cp, const std::string §ion)
217{
218 int i = 0, count;
219 paramIn(cp, section, "ptable.size", count);
220
221 pTable.clear();
222
223 while (i < count) {
224 TheISA::TlbEntry *entry;
225 Addr vaddr;
226
227 paramIn(cp, csprintf("%s.Entry%d", name(), i), "vaddr", vaddr);
228 entry = new TheISA::TlbEntry();
229 entry->unserialize(cp, csprintf("%s.Entry%d", name(), i));
230 pTable[vaddr] = *entry;
231 ++i;
232 }
233}
234
|