packet_access.hh (10563:755b18321206) | packet_access.hh (11013:7e31bd5968c0) |
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1/* | 1/* |
2 * Copyright (c) 2015 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * |
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2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright --- 12 unchanged lines hidden (view full) --- 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Ali Saidi 29 * Nathan Binkert | 14 * Copyright (c) 2006 The Regents of The University of Michigan 15 * All rights reserved. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions are 19 * met: redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer; 21 * redistributions in binary form must reproduce the above copyright --- 12 unchanged lines hidden (view full) --- 34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 39 * 40 * Authors: Ali Saidi 41 * Nathan Binkert |
42 * Andreas Sandberg |
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30 */ 31 32#include "arch/isa_traits.hh" 33#include "base/bigint.hh" 34#include "config/the_isa.hh" 35#include "mem/packet.hh" 36#include "sim/byteswap.hh" 37 38#ifndef __MEM_PACKET_ACCESS_HH__ 39#define __MEM_PACKET_ACCESS_HH__ | 43 */ 44 45#include "arch/isa_traits.hh" 46#include "base/bigint.hh" 47#include "config/the_isa.hh" 48#include "mem/packet.hh" 49#include "sim/byteswap.hh" 50 51#ifndef __MEM_PACKET_ACCESS_HH__ 52#define __MEM_PACKET_ACCESS_HH__ |
40// The memory system needs to have an endianness. This is the easiest 41// way to deal with it for now. At some point, we will have to remove 42// these functions and make the users do their own byte swapping since 43// the memory system does not in fact have an endianness. | |
44 | 53 |
45/** return the value of what is pointed to in the packet. */ | |
46template <typename T> 47inline T | 54template <typename T> 55inline T |
48Packet::get() const | 56Packet::getRaw() const |
49{ 50 assert(flags.isSet(STATIC_DATA|DYNAMIC_DATA)); 51 assert(sizeof(T) <= size); | 57{ 58 assert(flags.isSet(STATIC_DATA|DYNAMIC_DATA)); 59 assert(sizeof(T) <= size); |
52 return TheISA::gtoh(*(T*)data); | 60 return *(T*)data; |
53} 54 | 61} 62 |
55/** set the value in the data pointer to v. */ | |
56template <typename T> 57inline void | 63template <typename T> 64inline void |
58Packet::set(T v) | 65Packet::setRaw(T v) |
59{ 60 assert(flags.isSet(STATIC_DATA|DYNAMIC_DATA)); 61 assert(sizeof(T) <= size); 62 *(T*)data = TheISA::htog(v); 63} 64 | 66{ 67 assert(flags.isSet(STATIC_DATA|DYNAMIC_DATA)); 68 assert(sizeof(T) <= size); 69 *(T*)data = TheISA::htog(v); 70} 71 |
72 73template <typename T> 74inline T 75Packet::getBE() const 76{ 77 return betoh(getRaw<T>()); 78} 79 80template <typename T> 81inline T 82Packet::getLE() const 83{ 84 return letoh(getRaw<T>()); 85} 86 87template <typename T> 88inline T 89Packet::get(ByteOrder endian) const 90{ 91 switch (endian) { 92 case BigEndianByteOrder: 93 return getBE<T>(); 94 95 case LittleEndianByteOrder: 96 return getLE<T>(); 97 98 default: 99 panic("Illegal byte order in Packet::get()\n"); 100 }; 101} 102 103template <typename T> 104inline T 105Packet::get() const 106{ 107 return TheISA::gtoh(getRaw<T>()); 108} 109 110template <typename T> 111inline void 112Packet::setBE(T v) 113{ 114 setRaw(htobe(v)); 115} 116 117template <typename T> 118inline void 119Packet::setLE(T v) 120{ 121 setRaw(htole(v)); 122} 123 124template <typename T> 125inline void 126Packet::set(T v, ByteOrder endian) 127{ 128 switch (endian) { 129 case BigEndianByteOrder: 130 return setBE<T>(v); 131 132 case LittleEndianByteOrder: 133 return setLE<T>(v); 134 135 default: 136 panic("Illegal byte order in Packet::set()\n"); 137 }; 138} 139 140template <typename T> 141inline void 142Packet::set(T v) 143{ 144 setRaw(TheISA::htog(v)); 145} 146 |
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65#endif //__MEM_PACKET_ACCESS_HH__ | 147#endif //__MEM_PACKET_ACCESS_HH__ |