packet.hh (8949:3fa1ee293096) | packet.hh (9018:4fbbd05809d2) |
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1/* 2 * Copyright (c) 2012 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 77 unchanged lines hidden (view full) --- 86 ReadRespWithInvalidate, 87 WriteReq, 88 WriteResp, 89 Writeback, 90 SoftPFReq, 91 HardPFReq, 92 SoftPFResp, 93 HardPFResp, | 1/* 2 * Copyright (c) 2012 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 77 unchanged lines hidden (view full) --- 86 ReadRespWithInvalidate, 87 WriteReq, 88 WriteResp, 89 Writeback, 90 SoftPFReq, 91 HardPFReq, 92 SoftPFResp, 93 HardPFResp, |
94 // WriteInvalidateReq transactions used to be generated by the 95 // DMA ports when writing full blocks to memory, however, it 96 // is not used anymore since we put the I/O cache in place to 97 // deal with partial block writes. Hence, WriteInvalidateReq 98 // and WriteInvalidateResp are currently unused. The 99 // implication is that the I/O cache does read-exclusive 100 // operations on every full-cache-block DMA, and ultimately 101 // this needs to be fixed. |
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94 WriteInvalidateReq, 95 WriteInvalidateResp, 96 UpgradeReq, 97 SCUpgradeReq, // Special "weak" upgrade for StoreCond 98 UpgradeResp, 99 SCUpgradeFailReq, // Failed SCUpgradeReq in MSHR (never sent) 100 UpgradeFailResp, // Valid for SCUpgradeReq only 101 ReadExReq, --- 26 unchanged lines hidden (view full) --- 128 /** 129 * List of command attributes. 130 */ 131 enum Attribute 132 { 133 IsRead, //!< Data flows from responder to requester 134 IsWrite, //!< Data flows from requester to responder 135 IsUpgrade, | 102 WriteInvalidateReq, 103 WriteInvalidateResp, 104 UpgradeReq, 105 SCUpgradeReq, // Special "weak" upgrade for StoreCond 106 UpgradeResp, 107 SCUpgradeFailReq, // Failed SCUpgradeReq in MSHR (never sent) 108 UpgradeFailResp, // Valid for SCUpgradeReq only 109 ReadExReq, --- 26 unchanged lines hidden (view full) --- 136 /** 137 * List of command attributes. 138 */ 139 enum Attribute 140 { 141 IsRead, //!< Data flows from responder to requester 142 IsWrite, //!< Data flows from requester to responder 143 IsUpgrade, |
136 IsPrefetch, //!< Not a demand access | |
137 IsInvalidate, 138 NeedsExclusive, //!< Requires exclusive copy to complete in-cache 139 IsRequest, //!< Issued by requester 140 IsResponse, //!< Issue by responder 141 NeedsResponse, //!< Requester needs response from target 142 IsSWPrefetch, 143 IsHWPrefetch, 144 IsLlsc, //!< Alpha/MIPS LL or SC access --- 717 unchanged lines hidden --- | 144 IsInvalidate, 145 NeedsExclusive, //!< Requires exclusive copy to complete in-cache 146 IsRequest, //!< Issued by requester 147 IsResponse, //!< Issue by responder 148 NeedsResponse, //!< Requester needs response from target 149 IsSWPrefetch, 150 IsHWPrefetch, 151 IsLlsc, //!< Alpha/MIPS LL or SC access --- 717 unchanged lines hidden --- |